How to correctly configure CAN Rx Mailboxes Mask Register in MPC5748G?

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

How to correctly configure CAN Rx Mailboxes Mask Register in MPC5748G?

Jump to solution
1,840 Views
1622542013
Contributor II

How to correctly configure CAN Rx Mailboxes Mask Register in MPC5748G?

I want to receive message with specific ID .For instance 0x000,0x111,0x222 and so on.

  • The can configuration is as follows:

1.png

  • The can_fifo_config is as follows:

2.png

  • I send message to my device from ID 0X000 to ID 0X7FF,while the device receives something that is not in my expectation.

As follows:

3.png

It seems that the mask highest bit is not in effect.

0 - 400:

0000 0000 0000

0100 0000 0000

44 - 444:

0000 0100 0100

0100 0100 0100

111 - 511:

0001 0001 0001

0101 0001 0001

Because of the RX FIFO,it is right that to configure the CAN_RXFGMASK as 0x1fffffff. [0:28]

6.png

However there are some mistakes in somewhere.

Then I force CAN_RXFGMASK to be configured as 0x3fffffff. It does work.

4.png

5.png

Is there some mistakes in my knowledge? 

where is mistake?Please inform me in detail .

regards.

Labels (1)
0 Kudos
Reply
1 Solution
1,285 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

 

mask within a RXFGMASK should be shifted left by 1 bit as you can see in chapter 43.4.17 of the RM

pastedImage_1.png

so, to have exact match you need to set RXFGMASK = 0x3FF80000 (assuming standard ID is received).

Most probably the driver function does not shift the value properly.

 

With the RXFGMASK = 0x1FFC0000  the MSB of the ID is don't care, that's the reason you received such IDs.

 

BR, Petr

View solution in original post

4 Replies
1,286 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

 

mask within a RXFGMASK should be shifted left by 1 bit as you can see in chapter 43.4.17 of the RM

pastedImage_1.png

so, to have exact match you need to set RXFGMASK = 0x3FF80000 (assuming standard ID is received).

Most probably the driver function does not shift the value properly.

 

With the RXFGMASK = 0x1FFC0000  the MSB of the ID is don't care, that's the reason you received such IDs.

 

BR, Petr

1,285 Views
1622542013
Contributor II

Thank you for your reply.

Yes,you are right.

There may be a bug in the SDK.

The API(settting Rx FIFO global mask) dose not deal with CAN_MCR[IDAM] .

It only checks either standard id or extended id,but it is useless for CAN_RXFGMASK.

7.png

And it will clear the bits form 31 to 29. So it is never correct that use the API(FLEXCAN_DRV_SetRxFifoGlobalMask) to configure the CAN_RXFGMASK.

8.png

9.png

Best regards,gao

0 Kudos
Reply
1,285 Views
yukunwu
Contributor III

Hello, Mr. Gao,

   

   @泽乾 高

   Could you share the code you showed?

   I just want to know how to use RxFIFO to receive CAN MSG with multiple CAN IDs. I am using the API(status_t FLEXCAN_DRV_ConfigRxMb) to receive CAN MSG now ,but it can only receive the msg which CAN ID was defined.

   Many Thanks~ 

0 Kudos
Reply
1,285 Views
1622542013
Contributor II

You can configure the mask as follows:

FLEXCAN_DRV_SetRxMbGlobalMask(instance, FLEXCAN_MSG_ID_STD, 0x0U);
(void)FLEXCAN_DRV_SetRxIndividualMask(instance, FLEXCAN_MSG_ID_STD, Individual_num, 0x0U);

Hope it works for you.

Regards.

0 Kudos
Reply