我们现在测试发现，MPC5746R，核0的代码会影响到核1代码的运行。启用核0后，核1的代码运行好像变慢了。我们现在的需求是，核0的代码不要影响核1代码的运行，请问从哪方面入手？
We have discovered through testing that the code for core 0 of MPC5746R affects the operation of core 1's code. When core 0 is enabled, the code of core 1 seems to run slower. Our current requirement is that the code of core 0 should not affect the operation of core 1's code. Could you please give me some advise?
以前只是用核1，无操作系统；定时中断调度任务；main函数里有个while循环。main函数李while循环第一行代码运行的间隔，最大为23ms。
Previously, we used Core 1, without an operating system; scheduled tasks through timer interrupts; and in the main function there is a while loop. The maximum interval for the first line of code in the while loop in the main function was 23ms.
启用核0后，main函数李while循环第一行代码运行的间隔，最大为2000+ms。核0的代码近有自己是用的一个5ms中断处理，无任何外设。
After enabling core 0, the maximum interval for the first line of code in the while loop of the main function is 2000+ms. The code in core 0 is only a 5ms interrupt , without any peripherals
下图是XBAR的设置。
The following figure shows mysettings of XBAR.
You probably cannot achieve configuration where there is no performance influence when the same memory resources are used (sharing the same XBAR slave access ports).
It is quite common to leave XBAR setting untouched, but it may happen in certain situations that changing priorities is necessary, for instance if one master (core 0) continuously accessing certain slave and other master (core 1) cannot get free time slot to access the same slave. For example, choosing of round-robin arbitration scheme would solve this issue and both cores would have equal chance to access the slave.
You can further optimize the code by using DTCM and ITCM memories (local RAMs with high speed access to the dedicated core).
