Do we need to consider any internal package delays for the DDR2 pins when calculating the delay associated with a trace?
We are using an x16 DDR2 interface. So that there are unused pins in the DDR2 interface. There are GPIOs also unused. We haven't found any information in Hardware design documents regarding the state at which these unused pins need to be kept. Are they need to terminate to Ground or to kept floating?
Unused pins are recommended to be put in this configuration: Output buffer disabled, Input buffer disabled, Weak Pull Down enabled. So it may be left floating.
