MPC5643l capture problem

[zcc890406]

This is one bit in flexPWM module about the register of  Capture Control X Register (CAPTCTRLX). I can not understand the mean of  the different between 1and 0 and how to use them. I need  the help of an expert.

Thank you very much for your help 

[PetrS]

Hi,

Look at Figure 25-26 and description in the “E-Capture” chapter within a Reference Manual.

When INPSELX=0 then the PWMX input signal goes directly to both Capture circuits. By the EDGX1/EDGX0 bits you can select at which signal edge the internal counter value will be captured.

When INPSELX=1 then the input signal comes to an 8 bit counter which counts both the rising and falling edges.  The output of this counter is compared to an 8 bit value that is specified by the user (EDGCMPx) and when the two values are equal, the comparator generates a pulse that also resets the 8bit counter.  This output pulse is then used to trigger capture logic. Note: EDGX1/EDGX0 bits must be set still to enable capture logic.

BR, Petr

[zcc890406]

HI Petr Stancik,

   Thank you for your help.  Now I understand how to use it.

Tomas.