in a previous post I ask why in the following startup code
SRAM data is not initialized to value 0x00 in all bytes and you answer me that
What is the reason to avoid SRAM initialization to pattern 0x0000 0000 ?
The whole SRAM needs to be written by any value. Important is that it must be 64-bit write, to completely define ECC
code for data unit.
Users sometimes use special patterns having meaning of certain opcodes as 'nop' or branch to itself, but it is not necessary, it can be cleared.
Pay attention to section 1.1 of AN5200:
When I read your application note section 1.1 it says that " the whole SRAM is deleted or written by any value, however it must be either 64-bit write or 32-bit write" and when I read the table 2 which indicates which component is associated to 32 or 64 bits write my target (MPC5604B) as other MPC560xB uses the ECC 32+7.
So is it possible that I can initialize the SRAM by 32bits access with pattern 0x0000 0000 ?