MPC5602P CAN timing registers

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MPC5602P CAN timing registers

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richardtaylor11
Contributor I

We need to meet a specific CAN timing requirement for a customer as follows:

Nominal Bit Time   16 Tq

Tq distribution    1 11 2 2

SJW                          2

Sample Point %            87.5%

As PROPSEG can only take the values 0..7, how can the customer requirement be met? We thought of setting PROPSEG to 7, PSEG1 to 5, PSEG2 to 1 would give a Sample Point % of 87.5 % [Tq distribution 1 8 5 2] . Is such a set-up valid? Are there other approaches to take?

Apologies if this is a dumb question

2 Replies

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martin_kovar
NXP Employee
NXP Employee

Hello,

could you please write me, what is crystal clock and what is the bit rate you would like to achieve?

There is also bit timing document which could be helpful for you. Please check and let me know.

FlexCAN bit timing calculation 

Regards,

Martin

1,321 Views
richardtaylor11
Contributor I

Hello Martin

Many thanks for your response.

The crystal clock is running at 64Mhz and the bit rate we want is 1Mbit

At the moment we are about to try the following:

locCAN->CR.B.TSYN = 0; /* Timer sync feature disabled */

locCAN->CR.B.PROPSEG = 7; /* PROSEG = 7 => Propagation Segment Time = 8tq */

locCAN->CR.B.PSEG1 = 4; /* PSEG1 = 4 => Phase Buffer Segment 5 = 5tq */

locCAN->CR.B.PSEG2 = 1; /* PSEG2 = 1 => Phase Buffer Segment 2 = 2tq */

/* Overall bittime = TSYNC + PROPSEG + PSEG1 + PSEG2 = 1 + 8 + 5 + 2 = 16tq */

/* Sample position = 14/16 = 87.5% of the total bit */

locCAN->CR.B.RJW = 1; /* RJW = 1 => Resync Jump Width = 2tq */

locCAN->CR.B.PRESDIV = 3; /* PRESDIV = 3 => S-clock=64Mhz/(3+1) = 16Mhz */

Many thanks for the pointer to the document also, looks very helpful.

Regards

Richard

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