MPC5554 clock specification

[petersowden]

Hi there,

We are using an MPC5554AZP132 in bypass mode.

I have looked through "MPC5553_MPC5554_RM Rev. 5.1, 03/2012" and "MPC5554 Rev. 4, May 2012" looking for a definition (AC-wise) of what is required of the oscillator choice - rise/fall time, Mark/space ratio (Duty cycle) etc., and I haven't spotted this information.

Do you have a documented source of this information please?

Thanks,

Peter.

[davidtosenovjan]

There is no Rise/Fall time requirement for external clock signal. There is only requirement for voltage levels and duty cycle. 

Why you are using bypass mode? Bypass mode is normally only used to test the device in the factory and is not recommended for use by customers. “FMPLL External Reference Mode”  is recommended mode for clocking by external oscillator.

[petersowden]

Hi David,

Thanks for the reply. I appreciate it.

We are using a 112MHz oscillator directly….bypass mode ‘avoids’ the FMPLL section.

There is no text that I can find in the data sources (data sheet/user manual) to hint that bypass is not a recommended mode?

I asked the rise/fall question because:

We have two of these devices on our board. One fails to run a ‘simple’ programme.

The clock looks good, voltage and Mark/Space. The rise/fall of the clock is sub-nanosecond.

If I control the edge speed (slow it down) to say 1.3ns, the program now runs?

Thanks,

Peter.