Thank you for your feedback. I found an example of MPC5777 before and tried to configure my MPC5554, but some instructions were different (such as instruction e_lis e_or2i、se_bgeni、e_ori、se_isync), I didn't try successfully. The function is as follows. Can you help me make some rough modifications? Thank you.
static asm void External_SRAM_MMU_init(void)
{
e_lis r3,0x1006 // Select TLB entry#, define R/W replacment control
mtspr MAS0,r3 // Load MAS0 with 0x1002_0000 for TLB entry #2
e_lis r3,0xc000 // setup 512MBytes to cover the whole EBI space
e_or2i r3,0x0980 // TLB valid, protected from invalidation
mtspr MAS1,r3 // Load MAS1 with 0xC000_0980 for TLB entry #2
se_bgeni r3,2 // virtual address at 0x2000_0000
e_ori r3,r3,0x0038 // VLE, cache-inhibited, write through
mtspr MAS2,r3 // Load MAS2 with 0x2000_0038 for TLB entry #2
se_bgeni r3,2 // physical address at 0x2000_0000
e_ori r3,r3,0x003f // all accesses permitted
mtspr MAS3,r3
msync // make sure we finished all memory accesses
tlbwe // Write entry defined in MAS0 (entry #2 here) to MMU TLB
se_isync // Wait for tlbwe to complete, then flush instruction buffer
}