LIN Issue in MPC5668G single core?

[aswinkumarr]

Hi,

In MPC5668G, where I used LIN in Z0 core(all process and ISR) I used software vector interrupt in Z0 core.. In that everything works fine. When I moved my same code to(Z6 core) I am facing issue in LIN module. I am getting error frames.  Now in Z6 core I am using hardware vector interrupt mode(our requirement so cant change to software vector mode as like z0 core) and I am getting error frames in LIN. I checked with baudrate but issue still remains.

Please drop your suggestions to resolve.

Thanks,

Aswinkumar.

[martin_kovar]

Hi,

please clarify few points:

- Does e200z6 core have the same frequency as e200z0 core?

- Which error do you receive?

- Do you send/receive data between two (different) MCUs or between LIN modules in the same MCU?

This MCU does not support LIN module in slave mode.

Regards,

Martin

[aswinkumarr]

Hi,

Please find the details.

1. By default Z0 core operates on half of the system clock. I used 128Mhz so it works on 64Mhz. But Z6 core use the full system clock as such.

2. Error like checksum error or timeout error sometimes.

3. Sending data from different MCU only.

LIN is in master mode only.'

Thanks,

Aswinkumar

[martin_kovar]

Hi,

thanks for information. There is no direct relationship between eSCI(LIN) module and core. It means there must be different issue. Change of the core can not cause the errors you describe. Try to check baudrate setting once again. Also try to connect oscilloscope and look if there are correct frames on the bus.

Does this errors appear while transmitting or receiving data or in both cases?

Timeout error indicates some bit timing problems. CRC errors could indicate some electromagnetic disturbances or incompatible CRC model. Is there any change of environment?

Regards,

Martin

[aswinkumarr]

Hi,

Thanks for your reply,

I am facing error in Master response only. The environment is same. 

One change between the core is I used software interrupt vector mode in z0 core but now I am using hardware interrupt vector mode in z6 core. Is there any root cause due to this. And also the interrupt priority is low for LIN compared to other interrupts(like PIT, CAN). I increased the priority but no use. Because of low priority whether LIN interrupt in hardware vector mode is preempted?

Thanks.

[martin_kovar]

Hi,

it does not matter if you use hardware or software vector mode. The only possibility is to connect scope to slave and check the data which slave sends. From my point of view it seems that master is OK and the issue is on the slave.

Regards,

Martin

[aswinkumarr]

Thank you.

I will look into that in deep.

One more thing need to know. Is it possible to change the core clock of z6 to 64Mhz with system clock need to be as 128Mhz. Because by default z0 core takes 64Mhz as core clock with 128Mhz as system clock. Is it possible to do it same in z6 core?

[martin_kovar]

Hi,

it is not possible to set system clock to 128MHz and z6 core to 64MHz. If you want z6 core frequency 64MHz, you have to set the same frequency to system clock. Then z0 frequency will be 32MHz.

Regards,

Martin