Hi all,
I'm working on MPC5777C.
As first overview I must remark that I init MCU using CORE 0 only to start CORE1. All code is fetched by CORE1.
Inside the CORE 1 I execute the code suggest by Vlna Peter (MPC5777C-Online-MBIST+LBIST-v1_2-GHS614).
If I understand the routine SysClk_Init() the PLL works at 200MHz, FM_PER_CLK works at 100MHz, and the Clock for STCU2 unit works at 50MHz.
PLLDIG.PLL0DV.R = 0x5002100A;
SIU.SYSDIV.R = 0x05003110;
STCU2.CFG.R = 0x10000011;
So MBIST test works at 50MHz , LBIST works at clock fixed by
/* LBIST0 */
STCU2.LB[0].LB_CTRL.R = 0x04014504; /* STCU2_LB_CTRL0: Run Sequentially, next in sequence is LBIST4, SHS = 1 */
STCU2.LB[0].LB_PCS.R = 0x4C0;
STCU2.LB[0].LB_MISRELSW.R = 0x638CABD3;
STCU2.LB[0].LB_MISREHSW.R = 0xF6FEF134;
/* LBIST1 */
STCU2.LB[1].LB_CTRL.R = 0x02014504; /* STCU2_LB_CTRL1: Run Sequentially, next in sequence is LBIST2, SHS = 1 */
STCU2.LB[1].LB_PCS.R = 0x340;
STCU2.LB[1].LB_MISRELSW.R = 0x29CAE1DA;
STCU2.LB[1].LB_MISREHSW.R = 0xF547396A;
/* LBIST2 */
STCU2.LB[2].LB_CTRL.R = 0x05014504; /* STCU2_LB_CTRL2: Run Sequentially, next in sequence is LBIST5, SHS = 1 */
STCU2.LB[2].LB_PCS.R = 0x500;
STCU2.LB[2].LB_MISRELSW.R = 0x1AC8F17C;
STCU2.LB[2].LB_MISREHSW.R = 0x84F64979;
/* LBIST3 */
STCU2.LB[3].LB_CTRL.R = 0x7F014504; /* STCU2_LB_CTRL3: Run Sequentially, last in sequence, SHS = 0 */
STCU2.LB[3].LB_PCS.R = 0xA00;
STCU2.LB[3].LB_MISRELSW.R = 0xC59BF565;
STCU2.LB[3].LB_MISREHSW.R = 0x555F4ACF;
/* LBIST4 */
STCU2.LB[4].LB_CTRL.R = 0x03014504; /* STCU2_LB_CTRL4: Run Sequentially, next in sequence is LBIST3, SHS = 1 */
STCU2.LB[4].LB_PCS.R = 0xA40;
STCU2.LB[4].LB_MISRELSW.R = 0x15C9A73F;
STCU2.LB[4].LB_MISREHSW.R = 0xBD55BE6A;
/* LBIST5 */
STCU2.LB[5].LB_CTRL.R = 0x00014504; /* STCU2_LB_CTRL5: Run Sequentially, next in sequence is LBIST0, SHS = 1 */
i.e LBIST works at 25MHz.
Before starting the setting of clocks, I also disable CORE 0 (no CORE 1) and all unit (no STC2 clock) using:
SIU_HLT1 and SIU_HLT2 (no STCU2 clock).
I m using this code and test ON LINE works, but always the partition 3 and 4 of LBIST result with
STCU2_LB_MISRRLSW3, STCU2_LB_MISRRLHW3
STCU2_LB_MISRRLSW4, STCU2_LB_MISRRLHW4
different from the related expected value (already above reported and coherent with AN5288).
What can be happens?
Another problem for me is that I can see:
LBSSW4=0 (error)
LBSSW3=0 (error)
LBESW4=1 (finished)
LBESW3=1 (finished)
but
STCU2_ERR_STAT not report errors , but I m waiting for some indication into UFSF or RFSF.
At same time MBIST it seems works well with MPC5777C-Online-MBIST+LBIST-v1_2-GHS614 code (proposed by Peter)
Can some one explain me, where I miss?
Thanks into advance for answer.
