Hi,
if both capture circuits are enabled they are not triggered at the same time. They will work together in a ping-pong style, so once input capture process is started the capture circuit 0 is first armed and when a capture event occurs, capture circuit 1 is armed, and so on depending the capture mode.
For sure you can get the same value in CVALx registers, but it should belongs to another PWM period. You can read the CVALxCYC register to distinguish between PWM cycles.
BR, Petr