FlexCAN initialization & loopback MPC5645S

[schnedm]

I'm trying to go through a retired co-workers code for testing CAN function on a custom board using MPC5645s, but he didn't get it working before he left.   Goal of that test is to transmit some arbitary message from CANA.   Loopback is setup on a test box for CANA & CANB with terminating resistors in line.  Code passes the values in the message buffers along to a print function

I don't think that CANB (and maybe CANA too) are initialized correctly?  CANA_MCR & CANB_MCR have FRZ & HALT field enabled but then it is only negated on CANA_MCR.  Does HALT have to be negated before a transmit or receive can happen?  I also think that in the CAN B RX message buffer setup he might be calling out the wrong message buffer.  I haven't worked with FlexCAN/MPC family enough to know for sure.

Attached snippet of code: (Assume message buffers are already intialized correctly)

        mem32(CANA_MCR) = 0x5000003F; // Put in Freeze Mode & enable all 64 msg bufs
        mem32(CANB_MCR) = 0x5000003F;
        mem32(CANA_CR) = 0x04DB0006; // Configure for 8MHz OSC, 100KHz bit time
        mem32(CANB_CR) = 0x04DB0006;
        for(i = 0; i < 63; i++ )                      // DeActivate All Buffers
        {
                *CANA_MB[i] = 0x0;
                *CANB_MB[i] = 0x0;
        }
        //CAN B RX Message Buffer setup                       
        mem32(CANA_MB[0]) = 0x280000;        //SETUP CAN A MB AS inactive IDE=1 Length=8       
        mem32(CANA_MB[0] + 1) = 0x0;    //ID is Dont Care       
        mem32(CANA_MB[0]) = 0x04280000; //MB is active and empty, ready to receive       
        mem32(CANB_MB[0] + 2) = 0x0; // data bytes 0-3 cleared to prove successful transmission       
        mem32(CANB_MB[0] + 3) = 0x0; // data bytes 4-7 cleared to prove successful transmission       

        //CAN A TX message Buffer Setup
        mem32( CANA_MB[1] ) = 0x08000000;  // buffer is inactive
        mem32( CANA_MB[1] + 1) = 0x00000000;  // ID is Dont Care                       
        mem32(CANA_MB[1] + 2) = 0x01234567; //*data bytes 0-3;
        mem32(CANA_MB[1] + 3) = 0x89ABCDEF; //*data bytes 4-7
        mem32(CANA_MB[1]) = 0x0C680000;    //transmit,IDE=1 SRR=1, RTR=0
        mem32(CANA_MCR) = 0x0000003F;  // Disable Freeze mode         begin transmission
       
        while (mem32(CANB_MB[0] + 2) == 0)
        {
        printp("\nData expected = 0x01234567, received = 0x%X",  mem32(CANB_MB[0] + 2));
        wait_ms(500);
        printp("\nData expected = 0x89ABCDEF, received = 0x%X",  mem32(CANB_MB[0] + 3));
        wait_ms(500);       
        if(inbyte == 'Z') break;
                                       
        }

[PetrS]

Hi,

Yes, both the modules must leave the Freeze mode (negate HALT bit) to synchronize to the bus and allow TX/RX operation.

The chapter 20.6 of the MPC5645S RM gives you a FlexCAN init sequence.

For the CANB RX MB[0] setup you are right you mixed CANA and CANB modules, which is wrong.

So your CANB is still in freeze mode, thus does not receive anything. Moreover you have no MB set for RX operation on the CANB module, so your print function should give zeros on received data.

Anyway this is not the best way to test successful reception. You should always check the corresponding status flag bit in one of the interrupt flag (IFRL, IFRH) registers. Once the flag is set, means MB receive data, you should

- Read the Control and Status word (mandatory – activates an internal lock for this buffer)

- Read the ID field (optional – needed only if a mask was used)

- Read the Data field

- Read the Free Running Timer (optional – releases the internal lock)

Attached you have simple code for a communication between two modules, it is written for MPC5606S, but the modules are similar.

BR, Petr