FlexCAN RX Message Buffer Handling and BUSY State in MPC5674F

[mertk]

Hi all,

I am checking the IFLAG registers before reading the FlexCAN message buffers configured as RX. Should I also check whether the CODE field is in the BUSY state?

In the MPC5674FRM, the following information is given:

Upon reading the Control and Status word, if the BUSY bit is set in the Code field, then the CPU should defer the access to the MB until this bit is negated.

and

In summary: never do polling by reading directly the C/S word of the MBs. Instead, read the IFLAG registers.

Based on these statements, I am unsure how to detect that the CODE field has transitioned out of the BUSY state without polling the CODE field of the message buffers directly.

How should this be interpreted in practice?
Is checking the corresponding IFLAG sufficient to guarantee that the message buffer is safe to read?

Could you please suggest a reliable and recommended procedure for receiving messages using FlexCAN?

Looking forward to your insights.

Best regards,
Mert

[PetrS]

Hi,

you should wait for MB flag to be set. Then read the CS word, which also lock the MB. The MB lock prevents a new frame from being written into the message buffer when the CPU is reading it. If during this CS word read the BUSY flag will be set defer the access to the rest MB area until this bit is negated.

BR, Petr