Hello,
I am working on re-configuring FlexCAN Mailbox definitions for MPC5606B processor.
I am asked to make 32 Rx and 32 Tx Mailboxes ( 64 total ) able to receive/transmit messages with any IDs ( what means : Mask==0, Filter==0 ).
In the project I am working on all Mailboxes are defined using the following structure :
typedef struct
{
uint8 length;
Can_MbDirectionType ioType; /**< RX or TX */
Can_FilterMaskType filterMask;
Can_IdType id;
} Can_HardwareObjectType;
as an array of 56 objects of “Can_HardwareObjectType”,
For example ( just a couple of elements ) :
…
/* 2 - Message Name: BinaryEventConfigThreshold */
{
8u, /**< Length (bytes) */
CAN_DIR_RX, /**< Direction */
(Can_FilterMaskType)0x7ffu, /** Filter */
0x357u, /**< CAN Id if Extended ORed with 0x80000000 */
},
/* 3 - Message Name: D_Outputs */
{
1u, /**< Length (bytes) */
CAN_DIR_RX, /**< Direction */
(Can_FilterMaskType)0x7ffu, /** Filter */
0x311u, /**< CAN Id if Extended ORed with 0x80000000 */
},
…
As I am expected to make all Mailboxes receive/transmit messages with any IDs, I am re-defining them like this :
For Rx Mailboxes :
{
0u, /**< Length (bytes) */
CAN_DIR_RX, /**< Direction */
(Can_FilterMaskType) 0x0, /** Filter */
0x0u, /* CAN ID */
},
For Tx Mailboxes :
{
0u, /**< Length (bytes) */
CAN_DIR_TX, /**< Direction */
(Can_FilterMaskType) 0x0u, /** Filter */
0x0u, /* CAN ID */
},
My questions :
1) Am I defining them right ?
2) What should I specify for “Mailbox Length” field if I want to use the Mailboxes for receiving/transmitting messages with any IDs ?
Any ideas ?
Thank you for your help.
Hi Konstantin,
1) Am I defining them right ?
It could be, if the MB is properly filled from your given structure. The MB area is following...
2 facts must be considered.
- if you want to receive all IDs with both standard and extended format at least 2 MBs must be configured for reception one with IDE bit cleared (standard ID) and second with IDE bit set (extended)
- if RX queue is disabled, MCR[BCC]=0, the received message will be stored always in the first prepared RX MB, others will be never used.
2) What should I specify for “Mailbox Length” field if I want to use the Mailboxes for receiving/transmitting messages with any IDs ?
Length does not depend on ID.
For a RX MB, length is don't care, it is written by module once message is moved-in based on message data payload.
For a TX MB, length specifies how many bytes will be transmitted.
BR, Petr
Hi Petr,
Thank you for answering. Sorry for late reply : I was very busy.
My MCR[BCC]==1 and I am using 29 bit mode ( IDE==1 ).
Could you please shed some light upon the following :
1) Why ( and physically where in memory ) do I need those 2 MBs ? Where in the memory I am supposed to allocate them ? Are they related to any buffers for storing received or prepared for transmit data ?
2) Is a FIFO buffer a part of any mailbox ? In other words, so I need to allocate FIFO buffers myself, link to the mailboxes and implement their support programmatically myself ? Or all FIFO
operation is supported on the hardware level ?
Thanks again ! You really help !
Konstantin