FIFO width and Depth

[Questioner]

For SPI mode in MPC5748G we have 4 TX FIFO. So I need to find the width and depth of FIFO

[lukaszadrapa]

Hi,

the depth of TX FIFO is 4. Width is 32bits - 16bits of data and 16bits of command.

For more details, see please section "40.5.2.4 Transmit First In First Out (TX FIFO) buffering mechanism" and description of PUSHR register "40.4.7 PUSH TX FIFO Register In Master Mode (DSPIx_PUSHR)" in the reference manual:

https://www.nxp.com/webapp/Download?colCode=MPC5748GRM

Regards,

Lukas