ENGCLK

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ENGCLK

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mathias_edman
Contributor III

Hi,

I am working with MPC5777C. I tried to find the drift, accuracy/stability for the engineering clock (engclk) but cannot find it anywhere in the manual. Do you have any information about this?

Regards,

Mathias

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, unfortunately we don't this explicitly specified. An accuracy of this signal is mainly given by source and and jitter of PLL circuits.

What is the way how you want to use this signal? For the purpose of driving clocks to other peripheral there is CLKOUT signal on the device.

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mathias_edman
Contributor III

Hi David,

I was planning on driving a LIN device (SJA1124) with the engclk. It will be driven quite slow, so I think it is ok, but just wanted to know if there was any data on the clk itself.

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davidtosenovjan
NXP TechSupport
NXP TechSupport

You can setup ENGCLK source (before ENGCLK divider) to XOSC. In this case an accuracy is actually given by crystal itself, thus I would recommend to use it so.

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