EDMA Hardware Request on MPC5777C

[berat24]

Hello everyone,

My RFIFO(0) drain flag triggers EDMA relevant channel. On each trigger, I am moving one data from source to destination thanks to this trigger.

I would like to learn whether I have to disable and enable EDMA hardware request on ERQL register to receive another trigger after each data sending.

Sincerely. 

[davidtosenovjan]

Hi, if you want to stop accepting DMA request after minor loop, then you must have set DREQ bit in transfer control descriptor. Otherwise DMA request is applied again.

[berat24]

First of all, thank you your respond @davidtosenovjan 

If I do not set DREQ bit, DMA request depends on the situation of request source(for example RFIFO) or it is an error and so I have to set it?

[davidtosenovjan]

Sorry, I have written it a bit imprecisely. If DREQ is set, HW requests are masked, when the
current major iteration count reaches zero. Thus they are disabled after major loop. But you question was actually related to minor loops (every minor loops starts by one DMA trigger).

If DREQ is not set, after end major loop, TCD is executed again. No error is reported, unless there is not other reason for that.

[berat24]

Hi @davidtosenovjan 

You said 'If DREQ is not set, after end major loop, TCD is executed again.' 

I understand that if DREQ is not set, eDMA run again when citer reaches zero even if there is no other hardware request.

Am I wrong?

[davidtosenovjan · Accepted solution]

No, it is not so.

After end of major loop -

1) when DREQ is not set - HW request triggers another TCD execution

2) when DREQ is set - HW request does not trigger another TCD execution