Hi everyone,
I have multiple questions that I met when I read the MPC5674FRM, Application Note AN5200 and Application Note AN4513.
1 - In ECSM_ESR register part of RM, why re-reading the ECSM _ESR suggested? Is it just to be sure we read the ECSM_ESR correctly? The related figures is below;
mertk_0-1649656747961.png
2 - In 3.2 ECSM part of AN4513, there is information about using ECSM reporting without an interrupt is requested. I understand from this information, we can just use ECSM reporting without interrupts. (I don't want to handle the errors, I just want to know there is a problem.)
mertk_0-1649663721991.png
However, in 4.1 Single-bit error detection and correction Section of AN4513, I understand that if we set the R1BC and F1BR, it will result in an ECC request to the interrupt controller.
So I think there is a discrepancy. Can you give me a hand to figure out the topic?
3 - What is the meaning of "over program" which is seen in AN5200? How does writing the data B to the same flash memory location creates multiple bit ECC error?
mertk_1-1649668547094.png
Best regards,
Mert.