Hello
I want to ensure that my mpc5746c core clock is 160Mhz(it's max) because I hesitate on it due to some problems with OS timings.
So I wrote a code in the main.c as below:
Trig STM timer to start counting
while(1)
{
Counter++;
}
And store Counter when STM counter reach to 1 second.
But when I calculate the counter measured in 1 second(from STM timer) it seems the core clock which I configured to 160Mhz, is much lower, something like 80 or 40Mhz(due to Counter++ does not take exactly 1 clock cycle long)
I use this formula:
Core clokc= 1s / Counter
Could DFS has an impact on this core clock?? or something else is the issue?
MPC574xB-C-G