I am working on the e200z7 provided by the MPC5777C board.
I am currently having issues with the L1 caches. The caches are used by the kernel (both instruction and data, with write allocation policy on, in write-through mode).
However, when switching to user mode, the cache is not used at all. We checked the MMU entries flag and the cache is not inhibit for the addresses we access.
Do you have any other recommendation to fix this issue?