About core0,core1 and core2 for MPC5775K

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About core0,core1 and core2 for MPC5775K

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Contributor II

Hi,everybody:

        I have a question about cores for MPC5775K, I don`t know how to config these cores ,I want to use all of these cores so that I can get more performance, can you help me and give me a example about how to config core0 ,core1 and core2?

                                                                                                                                                            Thanks

                                                                                                                                                             Yanjun.Liang

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

you can find example codes here:

MPC5 software example list 

Only thing you must do is to add start of the cores as described in reference manual.

Here is example:

 /*example code... need to be modified according to header file */
 /* Enable Cores - Will start on next mode transition */
  MC_ME.CCTL[2].R = 0x00FE;    //z7a is enabled in all run modes

  MC_ME.CCTL[3].R = 0x00FE;    //z7b is enabled in all run modes
 
/* Set Start address for other cores: Will reset and start */
/* Flash addresses */
  MC_ME.CADDR2.R = z7a_start_address;              /* z7a */

  MC_ME.CADDR3.R = z4b_start_address;              /* z7b */

  //Mode transition to apply the cores settings
  MC_ME.MCTL.R = 0x30005AF0;              //DRUN Mode & Key
  MC_ME.MCTL.R = 0x3000A50F;              //DRUN Mode & Key
  while(MC_ME.GS.B.S_MTRANS);             //Waiting for end of transaction

Peter

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1329306846
Contributor III

        您好,看见你提的问题和我相似,所以如果你不介意的话,我想请教你一些问题。

        我正在学习使用MPC5675K的双核,我使用core 0存取数据到buffer当中,想利用core 1清除相应的buffer,可是却不清楚怎么操作。还有semaphore的作用是什么?16个gate有什么区别呢?

       谢谢,希望能得到您的帮助!

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1,932 Views
327222179
Contributor II

b55689

Hi,Martin,Idon't know where is Peter,so can you help me?

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1,933 Views
petervlna
NXP TechSupport
NXP TechSupport

Hi,

you can find example codes here:

MPC5 software example list 

Only thing you must do is to add start of the cores as described in reference manual.

Here is example:

 /*example code... need to be modified according to header file */
 /* Enable Cores - Will start on next mode transition */
  MC_ME.CCTL[2].R = 0x00FE;    //z7a is enabled in all run modes

  MC_ME.CCTL[3].R = 0x00FE;    //z7b is enabled in all run modes
 
/* Set Start address for other cores: Will reset and start */
/* Flash addresses */
  MC_ME.CADDR2.R = z7a_start_address;              /* z7a */

  MC_ME.CADDR3.R = z4b_start_address;              /* z7b */

  //Mode transition to apply the cores settings
  MC_ME.MCTL.R = 0x30005AF0;              //DRUN Mode & Key
  MC_ME.MCTL.R = 0x3000A50F;              //DRUN Mode & Key
  while(MC_ME.GS.B.S_MTRANS);             //Waiting for end of transaction

Peter

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327222179
Contributor II

Hi,Peter

            I have another question,what address I should set to the MC_ME.CADDR2.R or MC_ME.CADDR3.R?

            I have seen the reference manual for MPC5775K,it saids that NXPO.png

But I don`t know about what value to set bit 0-29 and bit 31:

1. Field 0-29 said that means we can use 0-29 to set the boot address ,but I don`t know what specific value I should set.

2.Field 31 said that means whether we can  reset  Z4a by set 0 or 1 when the next mode changed,what does it mean by the next mode change? And what value do you usually set in field 31?

                                                                                                                                                        thanks

                                                                                                                                                        Yanjun.Liang

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1,932 Views
petervlna
NXP TechSupport
NXP TechSupport

Hi,

1. I recommend you to always reset core on mode transition if you want to have it active after the mode transition.

2. Core Address - is really a start address for that particular core. So set it address when your code for that core starts.

Peter

1,932 Views
327222179
Contributor II

Hi,Peter

             As you said,I creat a new project ,it has 3 cores like this

pastedImage_1.png

pastedImage_1.png

            1.   I can`t find a definition whitch named "TURN_ON_CPU1 " and "TURN_ON_CPU2", when I define them ,it report that " warning: "TURN_ON_CPU1" redefined", so can you tell me where are they ?

            2.  I have transplant a demo code(MPC5775K-UART_with_Interrputs-S32DS_Z4_1), and it worked correctly in Z4 core.If I use this uart in Z4,  Can I use the uart in Z7a and Z7b whithout configing this uart again? If I want to use some Buffs or defines in Z7,and these buffs was defined in Z4, How can I write my code?

            3.  The debug configrations 

pastedImage_2.png

Does it mean that:

          When I start the debug ,my project will start at Z4, and then Z7a and Z7b are both worked?

I have try to debug Z4 and set the break point in Z7a , but it can`t stop at Z7a break point ,how can I debug both Z4 and Z7? 

One situation like that:

pastedImage_3.png

when I debug Z4 and set break point in Z7, my console  remind that :there is no source in my file,and I have checked my file.

Why my debugger can`t find the file ? Should I set some specific config in "debug as"?

pastedImage_4.png

Please answer my questions ,thank you ~

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1,932 Views
327222179
Contributor II

Hi.Peter

            Your answer is helpful,I will try your config to control these cores, thank you very much!

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