MPC5xxx Knowledge Base

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******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, third LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * Second core is started and second LED blinking is being performed by it. * The example configures the device for maximum performance (OPTIMIZATIONS_ON) * by initialization of instruction cache and enabling of branch prediction. * Example suppose MCU is configured for DPM (Decoupled-parallel mode). * Its intention is to offer advanced startup code additional to CW stationery. * * ------------------------------------------------------------------------------ * Test HW: xPC564xLKIT, PPC5643L Cut3 silicon * Target : internal_FLASH, RAM * Fsys: 120 MHz PLL0 * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Terminal: 19200-8-no parity-1 stop bit-no flow control via LINFlex0 * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * IT INITIALIZES EBI FOR EXTERNAL SRAM CONNECTED TO XPC564AKIT324S AND TEST IT. * * ------------------------------------------------------------------------------ * Test HW: XPC564AKIT324S * MCU: SPC5644AMVZ1 0M14X QAK1235G * Fsys: 150/132/120/12 MHz * Debugger: Lauterbach Trace32 * Target: RAM, internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** * Detailed Description: * Example show simple flash programming routine. During runtime it changes * content of field of constants 'test' (located in internal data flash). * Also it shows how to relocate data into FLASH (used linker command file * is MPC5675K_my_sections.lcf and MPC5675K_DEBUG_my_sections.lcf). * * Note: For complex tasks use SSD driver (Freescale site for particular device, * Software&Tools/Run-Time Software/Middleware-Device Drivers * ------------------------------------------------------------------------------ * Test HW: MPC5675KEVB * MCU: PPC5675KFMMSJ in Lock-Step mode * Fsys: 180/150 MHz CORE_CLK * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * The example configures the device for maximum performance (OPTIMIZATIONS_ON). * For XPC564AKIT324S it initializes EBI for mounted external SRAM. * Its intention is to offer advanced startup code additional to CW stationery. * ------------------------------------------------------------------------------ * Test HW: XPC564AKIT208S and XPC564AKIT324S * MCU: SPC5644AMMG1,0M14X and SPC5644AMVZ1,0M14X * Fsys: 150/132/120/12 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ******************************************************************************** NOTE: It cannot be used with MPC5642A device, only with MPC5644A and MPC5643A ! For MPC5642A device, use following project instead of attached one: Example XPC5642AKIT PinToggleStationery CW10.6

******************************************************************************** * Detailed Description: * Application performs basic initialization then it initializes EBI for external * SRAM connected to MPC5777C-516DS and test it by write and read of block of * data. * * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 3N45H * Fsys: PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: jumper J4 on position 1-2 (choosing CS0) * EMIOS1 (PortI P16-0) --> USER_LED_1 (P7-1) to see LED blink ******************************************************************************** Revision History: Ver Date Author Description of Changes 0.1 Jun-26-2017 David Tosenovjan Initial version 0.2 Oct-13-2017 David Tosenovjan Lower CLKOUT frequency 0.3 Feb-02-2020 David Tosenovjan Corrected External_SRAM_MMU_init Ported to S32 design studio *******************************************************************************/

******************************************************************************** * Detailed Description: * * Configures the FlexCAN to transmit and receive a CAN message. * ECC reporting in the FlexCAN module is disabled. * * In this config, CAN_A transmits a message. CAN_B receives the message. * CAN_A MB8 is configured to send data. CAN_A sends message each 1sec. * This interval is generated by PIT. * CAN_B MB9 is configured to receive a message, SW polling is used. * * Connect CAN0-CANH on P15-1 to CAN1-CANH on P14-1 * Connect CAN0-CANL on P15-2 to CAN1-CANL on P14-2 * * * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 2N45H CTZZS1521A * Fsys: PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * use USB connector (J21) on minimodule * * EVB connection: ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) * ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, second LED by software * loop, initializes and display notice via UART terminal and then terminal ECHO. * * ------------------------------------------------------------------------------ * Test HW: XPC563MKIT * MCU: PPC5633MMLQ80 * Fsys: 80/60/40/12 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************

******************************************************************************** Detailed Description: Example shows configuration of SIUL External interrupts using SDK driver. EIRQ0 (PA3) and EIRQ11 (PE12) are configured for detecting rising edge. Those pins are connected to switches SW1 and SW2 on DEVKIT board. EIRQ1 (PA6) is configured for detecting falling edge. Within its interrupt routines a LEDs are toggled upon edge detecting. See PinSetting component for pins configuration within "Routing" and "Functionals Properties" tabs. To see falling edge on PA6 just connect pin (J2.1) to GND shortly. * ------------------------------------------------------------------------------ * Test HW: DEVKIT-MPC5748G * MCU: PPC5748GSMKU6 0N78S * Target: Debug_FLASH * EVB connection: * Compiler: S32DS.POWER.2017.R1 * SDK release: S32_SDK_S32PA_BETA_2.9.0 * Debugger: S32DS, Lauterbach Trace32 ******************************************************************************** Revision History: Ver Date Author Description of Changes 0.1 Jun-13-2019 Petr Stancik Initial version *******************************************************************************/

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * start both Z7 cores, interrupts initialization, blinking three LED by interrupts, * initializes and display notice via UART terminal and then terminal ECHO. * Each core serves one interrupt and one LED. * * The example configures the device for maximum performance by initialization of * instruction/data cache and enabling of branch prediction for each core * (startup.s files). * * ------------------------------------------------------------------------------ * Test HW: MPC5775K-356DS, MPC57xx Motherboard * MCU: PPC5775KMMY3A 0N38M * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFlexD_0 * Fsys: PLL0 266MHz * Z4 Core 133MHz * Both Z7 Cores 266MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: internal_FLASH (debug mode, release mode) * EVB connection: USER LED1 connected to P19.0, LED2 connected to P19.5 * LED3 connected to P19.8 * For correct UART functionality connect: * J14.2 to P12.6 * J13.2 to P12.7 * ********************************************************************************

Detailed Description: Demo application measures analog voltage from externally connected humidity sensor HIH-5030. Obtained values and processed and displayed on MPC5606S-DEMO-V2 board’s TFT panel. Application uses standard Graphics Libraries for MPC5606S for simple graphic output that is managed in mc_base.c module only. ------------------------------------------------------------------------------ Test HW: MPC5606S-DEMO-V2 + HIH-5030 MCU: PPC5606SEF OMLU 0M25V DD68391 XOTAC1003 Fsys: 64MHz Debugger: Lauterbach Trace32 Target: internal_FLASH Terminal: none EVB connection: For complete project you may see following link: Demo application MPC5606S-DEMO + LM75B + HIH-5030 + PCA8565 + GUI

******************************************************************************** * Detailed Description: * This example initializes SMPU_0 and SMPU_1 to cover all memory resources for * all masters. * Simple test case is used in this example: after initialization, SMPU * configuration is changed to disable write access to last 4kB of RAM. * Once this area is written by CPU, exception will occur due to access * violation. * ------------------------------------------------------------------------------ * Test HW: MPC57xx * Maskset: 1N81M * Target : SRAM * Fsys: 160 MHz PLL * ********************************************************************************

******************************************************************************** * Detailed Description: * * * This example shows usage of FlexPWM and Sine Wave generator (SGEN) modules. * The setting is selected in the way to have a PWM output signal synhronized with * SGEN output signal. This is necessary for resolver usage in motor control appls. * * See attached Excel sheet for calculation of parammeters used here (AUX0_clk_DIV0, * AUX0_clk_DIV1, SGEN_IOFREQ, PWM_PRESCALER, PWM_MODULO). * * This example is set for 2.44140625 kHz SGEN/PWM frequency. * * * ------------------------------------------------------------------------------ * Test HW: MPC57xx * Maskset: 1N65H * Target : internal_FLASH * Fsys: 200 MHz PLL with 40 MHz crystal reference * * EVB connection: * * P20.1 - D[7] .. SGEN output * connected to FEC PHY's MIIMODE input on motherboard, * to see full amplitude remove J26 * * P8.12 - A[11] .. FlexPWM A[0] output * P8.11 - A[10] .. FlexPWM B[0] output * * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts, blinking one LED by interrupt, * initializes and display notice via UART terminal and then terminal ECHO. * * You can choose TRK or Minimodule version using USED_BOARD macro * * ------------------------------------------------------------------------------ * Test HW: XPC560P 100LQFP, XPC56XX EVB MOTHEBOARD Rev.B, TRK-MPC5604P Rev.B * MCU: PPC5604PEFMLL 0M36W * Terminal: 19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * Fsys: 64/40 MHz * Debugger: Lauterbach Trace32 * PeMicro USB-ML-PPCNEXUS * Target: RAM, internal_FLASH * EVB connection: Jumper J8 1st position fit LED1 connected to PE4, jumpers J22,23 position 2-3 fit SCI tx and rx connected * ********************************************************************************

******************************************************************************** * Detailed Description: * * LINFlexD_1 configured as Master * - sends Header * - either transmits a data to LIN Slave or receives data from a LIN Slave * - no interrupt is used, just SW pooling * * LINFlexD_0 as Slave * - receives header from a LIN Master * - either receives data from a LIN Master or transmits a data to Master * - filter is enabled * - TX interrupt is used to prepare data to send and * - RX interrupt to read received data * * EVB connection: * * LIN1 circuitry * connect 12V to LIN1-VSUP, so connect J23.1 to P11.3 * J13, J12 jumpers placed * * LIN0 circuitry * remove J11 * * connect LIN1 to LIN0, so connect P11 to P9 * if do not have desired cable, connect P11.3-P9.3 and P11.4-P9.4 * * See LIN signal on P11.4 or P9.4. * * ------------------------------------------------------------------------------ * Test HW: X-MPC574xG-324DS + X-MPC574XG-MB * Maskset: 1N81M * Target : FLASH * Fsys: 160 MHz PLL * ********************************************************************************

This demo performs a communication on LIN bus between two MPC5604B EVBs. LinFlex0 LIN Master ******************************************************************************** * Detailed Description: * - send header from a LIN Master * - either receive data from a LIN Slave or transmit a data * - no interrupt is used, just SW pooling * * ------------------------------------------------------------------------------ * Test HW: XPC560B 144 LQFP MINIMODULE, XPC56XX EVB MOTHERBOARD, SPC5604B 2M27V * Target : internal_RAM, Flash * LinFlex0: Lin Master, 19200 baudrate * Fsys: 64 MHz PLL with 8 MHz crystal reference * * ------------------------------------------------------------------------------ * EVB connections and jumper configuration * * XPC56XX EVB MOTHERBOARD * for LinFlex0 connection to the MC33661 LIN transceiver: * - RXDA_SEL (near SCI !!!!) jumper over pins 1-2 * - TXDA_SEL (near SCI) jumper over 1-2 * * for LIN Master functionality * - VSUP (J6) jumper fitted * lin xceiver will get +12V from the EVB * - V_BUS (J14) jumper not fitted * - MASTER_EN jumper fitted * - LIN_EN jumper fitted * ******************************************************************************** LinFlex0 LIN Slave ******************************************************************************** * Detailed Description: * - receive header from a LIN Master * - either receive data from a LIN Master or transmit a data * - Filter can be enabled with the FILT_EN = 1 * - If filter is enabled TX interrupt is used to prepare data to send and * RX interrupt to read received data * - If filter is disabled SW polling is used * * ------------------------------------------------------------------------------ * Test HW: XPC560B 144 LQFP MINIMODULE, XPC56XX EVB MOTHERBOARD, SPC5604B 2M27V * Target : internal_RAM * LinFlex0: Lin Slave, 19200 baudrate * Fsys: 64 MHz PLL with 8 MHz crystal reference * * ------------------------------------------------------------------------------ * EVB connections and jumper configuration * * XPC56XX EVB MOTHERBOARD * for LinFlex0 connection to the MC33661 LIN transceiver: * - RXDA_SEL (near SCI !!!!) jumper over pins 1-2 * - TXDA_SEL (near SCI) jumper over pins 1-2 * * for LIN Slave functionality * - VSUP (J6) jumper not fitted ...LIN transceiver will get +12V from the Master * - V_BUS jumper not fitted * - MASTER_EN jumper not fitted * - LIN_EN jumper fitted * ********************************************************************************

******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate Multi-bit or Single-bit * ECC error in internal SRAM (user must choose it in the option at the end of * main function). * Error Injection Module is used to generate a non-correctable (or single-bit) * ECC error in RAM. The bad data is accessed then, so the IVOR1 exception (or * ERM combined interrupt service routine) is generated and handled. * Example also offers useful macros for EIM and ERM modules. * The example displays notices in the terminal window (USBtoUART bridge J21) * (19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * * ------------------------------------------------------------------------------ * Test HW: MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU: PPC5777CMM03 2N45H CTZZS1521A * Fsys: PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger: Lauterbach Trace32 * Target: internal_FLASH * Terminal: 19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: eSCI_A is USBtoUART bridge (connector J21) * ********************************************************************************

******************************************************************************** * Detailed Description: * In case user want GHS to initialize all cores it is necessary to define * preprocessor symbol: init_cores * However in this example the cores are initialized from function: Core_Boot(); * This example demonstrates how to initialize clock module and activate core0, core1 and core0 locksteped core. * ------------------------------------------------------------------------------ * Test HW: MPC57xx EVB * Maskset: 0N78H * Target : internal_FLASH * Fsys: 200 MHz PLL * ******************************************************************************** Revision History: 1.0 Feb-08-2016 b21190(Vlna Peter) Initial Version 1.1 Feb-09-2016 b21190(Vlna Peter) Added Core_Boot() function *******************************************************************************/

This example follows application notes AN3283 and AN4365. It is intended for users who develop own JTAG programmer. It shows how to implement basic functions: - enter debug mode during reset - enable external debug mode - OnCE access to GPR, SPR and memory - Nexus access to memory The example is written in PRACTICE script language using Trace32 debugger from Lauterbach (www.lauterbach.com). Low level functions for JTAG are used, so users can see sequences of ‘0’s and ‘1’s which are sent to JTAG interface. Used commands are described in this document: www2.lauterbach.com/pdf/general_ref_j.pdf This example was tested on MPC5607B device and VLE instruction set was used for OnCE access.

This session will explain how Freescale can enable customers to develop 76-81 GHz short and long range radar applications using the MPC577xK MCU, it will explain the concepts of the radar algorithms, including practical aspects such as SDADC or MIPI CSI sampling, Chirp Generation, Data Compression, R,V FFT, Detection and Tracking algorithms, and the benefits of the new Freescale IP that can allow them to improve their system resolution and accuracy. In this session customers will take away a detailed understanding of how to develop fast modulation radar systems using the MPC577xK MCU including the BOM cost advantages it also brings.