Example MPC5744P 1b+2b_PERRAM_ECC_error_injection GHS614

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Example MPC5744P 1b+2b_PERRAM_ECC_error_injection GHS614

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Example MPC5744P 1b+2b_PERRAM_ECC_error_injection GHS614

********************************************************************************
* Detailed Description:
* Purpose of the example is to show how to simulate Multi-bit or Single-bit ECC
* error in internal DMA TCD RAM (user must choose it in the option at the end of
* main function).
* EIM (Error Injection Module) is used to simulate a multi-bit or single-bit
* ECC error in DMA TCD RAM (Peripheral RAM).
* When corrupted data is accessed the IVOR1 exception handler is called in case
* of multi-bit ECC error (IVOR1 exception occurs) and FCCU_Alarm_Interrupt
* handler is called in case of single-bit ECC error (FCCU interrupt occurs).
* Both function calls MEMU handler.
* The example displays notices in the terminal window (connector J19 on
* MPC57xx_Motherboard)(19200-8-no parity-1 stop bit-no flow control on eSCI_A).
* No other external connection is required.
* ------------------------------------------------------------------------------
* Test HW:         MPC57xx_Motherboard + MPC5744P-144DC
* MCU:             PPC5744PFMLQ8,0N15P,QQAA1515N, Rev2.1B
* Fsys:            200 MHz PLL with 40 MHz crystal reference
* Debugger:        Lauterbach Trace32
* Target:          internal_FLASH, RAM
* Terminal:        19200-8-no parity-1 stop bit-no flow control
* EVB connection:  default
********************************************************************************

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Hello, I encountered a problem in the process of testing 5744: MEMU_PERIPH_RAM_CERR,MEMU_PERIPH_RAM_UNCERR injection failed to make the MEMU_ERR_FLAG register PR_CE,PR_UCE set, the test code is downloaded from the NXP website. At the end of the main function injection, the code is as follows:

#define EIM_EICHEN_DMA_memory_0 0x80000000u
// must be somewhere in DMA TCD area i.e. 0xFC0A1000-0xFC0A13FE
#define Injected_ECC_error_address 0xFC0A1000u
void Generate_1b_ECC_error_in_DMA_TCD(void)
{
register vuint32_t test_read = 0u;

//printf("ECC 1b error injected into RAM\r\n");

/* invert 1 LSB bits to create non-correctable data error */
EIM.EICHD_Word1.R = 0x00000001u;

/* PRAMC_0 channel error injection enable */
EIM.EICHEN.R = EIM_EICHEN_DMA_memory_0;

/* global error injection enable */
EIM.EIMCR.R = 1u;

/* error caused by read (it should set MCSR[MAV, LD, BUS_DRERR]) */
test_read = *(unsigned int*) Injected_ECC_error_address;

}

void Generate_2b_ECC_error_in_DMA_TCD_duplicate(void)
{
register vuint32_t test_read = 0u;

//printf("ECC 2b error injected into RAM\r\n");

/* invert 2 LSB bits to create non-correctable data error */
EIM.EICHD_Word1.R = 0x00000003u;

/* PRAMC_0 channel error injection enable */
EIM.EICHEN.R = EIM_EICHEN_DMA_memory_0;

/* global error injection enable */
EIM.EIMCR.R = 1u;

/* error caused by read (it should set MCSR[MAV, LD, BUS_DRERR]) */
test_read = *(unsigned int*) Injected_ECC_error_address;

}

note: FLASH_RAM,SYS_RAM can use NXP Web site code to implement error_injection.

Thank you very much for your help!

I am sorry but I don't understand you. Could you clarify what exactly does not work for you? Thanks

Hello David ,

      1b+2b_PERRAM_ECC_error_injection doesn't work in my main function,PR_CE and PR_UCE of MEMU_ERR_FLAG register are always zero,my chip is SPC5744PFK1AMLQ9,the 1b+2b_PERRAM_ECC_error_injection code that injected into the main function is as the follows pictures:

      Thanks for your help!!

peritheral_1bit.png

peritheral_2bit.png

Version history
Revision #:
2 of 2
Last update:
‎02-20-2021 06:37 AM
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