Hi,
I am working with iMX93EVK board (especially bare metal programming of Cortex-M33)
I have tried the examples (ethosu_apps) available as part of sdk_2_16 and I observed that, the code is executing from ITCM memory, M33 Code TCM (0FFE_0000 - 0FFF_FFFF) ~128KB.
I am trying to build my application based on "ethosu_apps" and I am facing weird issues, where if I add some debug prints at some point in the code, the build crashes at previous points (which worked before) and I started seeing garbage strings in the logs that are printed.
Not only with the prints, even if I add few lines of code, then the build crashes uexpectedly on Cortex-M33
I have placed my linker script code here. (I couldn't find any file attach options, so directly pasting the code)
/*
** ###################################################################
** Processor: MIMX9352DVNxL_cm33
** Compiler: GNU C Compiler
** Reference manual: IMX93RM, Internal, November. 2021
** Version: rev. 1.0, 2021-11-16
** Build: b220308
**
** Abstract:
** Linker file for the GNU C Compiler
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2022 NXP
** All rights reserved.
**
** SPDX-License-Identifier: BSD-3-Clause
**
** mail: support@nxp.com
**
** ###################################################################
*/
/* Entry Point */
ENTRY(Reset_Handler)
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x4000;
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x6000;
M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0478 : 0x0;
/* Specify the memory areas */
MEMORY
{
m_interrupts (RX) : ORIGIN = 0x0FFE0000, LENGTH = 0x00000478
m_text (RX) : ORIGIN = 0x0FFE0478, LENGTH = 0x0001FB88
m_data (RW) : ORIGIN = 0x20003000, LENGTH = 0x0001B000
m_m33_suspend_ram (RW) : ORIGIN = 0x20000000, LENGTH = 0x00002000
m_a55_suspend_ram (RW) : ORIGIN = 0x20002000, LENGTH = 0x00001000
m_ocram (RW) : ORIGIN = 0x20480000, LENGTH = 0x00060000
m_rsc_tbl (RW) : ORIGIN = 0x2001E000, LENGTH = 0x00001000
}
/* Define output sections */
SECTIONS
{
/* Interrupt vector table */
.interrupts :
{
__VECTOR_TABLE = .;
__Vectors = .;
. = ALIGN(4);
KEEP(*(.isr_vector))
. = ALIGN(4);
} > m_interrupts
.resource_table :
{
. = ALIGN(8);
KEEP(*(.resource_table))
. = ALIGN(8);
} > m_text
/* Program code */
.text :
{
. = ALIGN(4);
*(.text)
*(.text*)
*(.glue_7)
*(.glue_7t)
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
} > m_text
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > m_text
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > m_text
.ctors :
{
__CTOR_LIST__ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
} > m_text
.dtors :
{
__DTOR_LIST__ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
} > m_text
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > m_text
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} > m_text
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
} > m_text
__etext = .;
__DATA_ROM = .;
.interrupts_ram :
{
. = ALIGN(4);
__VECTOR_RAM__ = .;
__interrupts_ram_start__ = .;
*(.m_interrupts_ram)
. += M_VECTOR_RAM_SIZE;
. = ALIGN(4);
__interrupts_ram_end__ = .;
} > m_ocram
__VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
__RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
.data : AT(__DATA_ROM)
{
. = ALIGN(4);
__DATA_RAM = .;
__data_start__ = .;
*(.data)
*(.data*)
*(.rodata)
*(.rodata*)
*(.got)
*(.got.*)
. = ALIGN(16);
KEEP(*(.jcr*))
. = ALIGN(4);
__data_end__ = .;
} > m_ocram
__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
text_end = ORIGIN(m_text) + LENGTH(m_text);
.ocram.init : AT(__DATA_END)
{
__ocram_data_start__ = .;
. = ALIGN(16);
*(.bss.tensor_arena_ocram)
__ocram_data_end__ = .;
} > m_ocram
.bss :
{
. = ALIGN(4);
__START_BSS = .;
__bss_start__ = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
__END_BSS = .;
} > m_ocram
.m33_suspend :
{
*(M33SuspendRam)
. = ALIGN(4);
} > m_m33_suspend_ram
.heap :
{
. = ALIGN(8);
__end__ = .;
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
__heap_limit = .;
} > m_ocram
.stack (NOLOAD) :
{
__StackLimit = .;
. += STACK_SIZE;
__StackTop = .;
PROVIDE(__stack = __StackTop);
} > m_data
__StackTop = ORIGIN(m_data) + LENGTH(m_data);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
__RscTblStart = ORIGIN(m_rsc_tbl);
__RscTblEnd = ORIGIN(m_rsc_tbl) + LENGTH(m_rsc_tbl);
.ARM.attributes 0 : { *(.ARM.attributes) }
#ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
}
I can confirm that, there is no corruption between stack and heap, as I have kept stack in m_data (TCM memory) and heap in m_ocram (OCRAM memory)
So, can someone please provide any suggestions/ insights on whether I am missing something here?
Thanks!