MCXA346 DMA channel link

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

MCXA346 DMA channel link

973 Views
346500452
Contributor III

你好,

        我在官方例程frdmmcxa346_edma3_channel_link的基础上,想修改让内存再次搬运一次,并且已经将源地址和目标地址做了配置,但是在第一次搬运完成后,启动第二次搬运,启动不了,附件是我修改后的程序。

346500452_1-1768385066331.png

 

346500452_0-1768384962192.png

 

 

期望答复!谢谢

Labels (1)
0 Kudos
Reply
3 Replies

932 Views
carlos_o
NXP TechSupport
NXP TechSupport

Hi @346500452 

I use a translate tool to support you, I understood that you want to modify the example to do more than one transfer, but your code gets stuck waiting the g_Transfer_Done to set. Let me know if something is missing in translation. 

You need to modify the EDMA_PrepareTransfer params, please review the function brief and params. If you are not interested in the Channel Link functionality, I recommend you review the edma3_memory_to_memory examples instead. 

0 Kudos
Reply

919 Views
346500452
Contributor III

Hi

Your understanding is correct. It is indeed what I wanted to do.

The reason why I want to try this example is that I want to use DMA and ADC together.

I want to achieve the function of synchronous acquisition of 3 ADCs. Currently, I have accomplished this using a certain method. The three ADCs use the timer to trigger for synchronous acquisition, and a DMA channel is configured for each ADC. In the DMA channel interrupt, it is determined whether the current data acquisition is completed. This means that there are three ADCs corresponding to three DMA channels.

After the DMA transfer is completed, since it is a 3-channel operation, there will be three DMA channel interrupt service functions.

1. I want to reduce the number of DMA interrupts from three to one in order to lower the system load.

2. Since it is a synchronous collection, it is impossible to determine which DMA transfer was completed first. Therefore, it is necessary to check whether all three channels have been completed.

I have studied the channel joint function of DMA. Can I achieve the above function by using 3 minor loops and 1 major loop? This way, there will only be one DMA channel interruption, and it can ensure that each ADC data is successfully transferred.

I'm not sure if my understanding is correct. Please let me know if I'm wrong.

Thank you.

0 Kudos
Reply

827 Views
carlos_o
NXP TechSupport
NXP TechSupport

Hi @346500452 

Thanks for confirming the translation and giving more details about your goal.

You are correct you could accomplish it with 3 minor loops and 1 major loop, my recommendation is to channel link with Minor and Major loops to trigger the 3 eDMA configs simultaneously but only enable one channel major loop interrupt. 

carlos_o_0-1768589171209.png

At the interrupt you could review the other 2 eDMA status to know if they finished the transfer. 

0 Kudos
Reply