using SPI In-System Programming - who is the master

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using SPI In-System Programming - who is the master

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veneff
Contributor I

Because the EVK board (lpcxpresso54608) we were able to obtain (revision B) does not provide a connection to UART0 for reflashing, I'm trying to implement reflash via SPI (FlexComm3).  I do not see any configuration info.  I assumed that my master processor would be the SPI master, but that may not be the case.  Are there any examples or additional information as how to do this.  So far all I have to go by is the LPC5460X user guide - UM10912.

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bin_er
NXP Employee
NXP Employee

Hi Vance Neff,

1. The SPI ISP cannot work in LPCXPRESSO Board 5460x because the P0_2-ISP_FC3_MISO connects to the emulator always without a switch, you can notice the U24 in schematics which nOE is not controlled

2. The bug in schematic is fixed in Revision C, If you would like to do SPI ISP in REV C, You should set JP6 in rev C

3. SE Team is developing a Application Note for I2C and SPI ISP programming, it is still in process

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veneff
Contributor I

Thank you for your response.

That will make our development difficult!

But, can you give a link to revision B schematic?

Only one I found was rev C which does not make MISO issue clear.

Thank you,

Vance Neff

Partech, Inc.

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On Thu, Mar 30, 2017 at 10:05 PM, lowpowermonster <admin@community.nxp.com>

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bin_er
NXP Employee
NXP Employee

Hi Vance Neff

It is not release to public, can you share me your mail address please?

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veneff
Contributor I

Sure, it is vneff@partechgss.com

Thank you,

Vance Neff

Partech, Inc.

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bin_er
NXP Employee
NXP Employee

Hi Vance,

I guess you have noticed the https://community.nxp.com/message/891911#comment-892991<https://community.nxp.com/thread/448056#comm...;

The schematics is over there either

Thanks,

Bin

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veneff
Contributor I

Hi Bin,

Yes Thank you!

I did retrieve the Rev B EVK board schematics, etc.

Any progress with the SPI / ISP interface description. The manual gives

the function codes, etc. but no details on the SPI interaction, ie. first

thing, who is the SPI master? etc.

Thank you,

Vance Neff

Partech, Inc.

*This email may contain material that is confidential, privileged and/or

attorney work product for the sole use of the intended recipient. Any

review, reliance or distribution by others or forwarding without express

permission is strictly prohibited. If you are not the intended recipient,

please contact the sender and delete all copies.*

On Wed, Apr 5, 2017 at 11:41 PM, lowpowermonster <admin@community.nxp.com>

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robjansen
Contributor III

See this topic for the schematics of the rev. B board:

https://community.nxp.com/message/891911#comment-892991 

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