RT1050EVKB QSPI

[scottdewey]

I am trying to get the QSPI to operate on the rt1050-EVKB.

I have so far:

So far I have:

• removed the resistors from the hyperflash
• installed the needed 0 ohm resistors around the QSPI.
• Updated the OpenSDA firmware to k20dx_mimxrt1050_evk_qspi_if_crc.bin
• I have changed MIMXRT1050-EVK_S26KS512S.cfx to MIMXRT1050-EVK_IS25WP064A.cfx
• I have the QSPI Boot mode on the board set to: SW7-1 = 0 SW7-2=0 SW7-3=1 SW7-4=0

It looks like I am getting a few different errors starting with the connect script but it does look like the flash was successfully written. 

MCUXpresso IDE RedlinkMulti Driver v11.3 (Jan 11 2021 16:41:13 - crt_emu_cm_redlink build 9)
Found chip XML file in C:/Users/DeweyS/Documents/MCUXpressoIDE_11.3.0_5222/workspace/evkbimxrt1050_hello_world/Debug\MIMXRT1052xxxxB.xml
Reconnected to existing LinkServer process.
============= SCRIPT: RT1050_connect.scp =============
RT1050 Connect Script
DpID = 0BD11477
APID = 0x04770041
Error: Wire Ack Wait Fault
Disabling MPU
Error: Wire Ack Wait Fault
Error: Wire Ack Wait Fault
Configure FlexRAM for 256KB OC RAM, 128KB I-TCM, 128KB D-TCM
Error: Wire Ack Wait Fault
Error: Wire Ack Wait Fault
Error: Wire Ack Wait Fault
Finished
============= END SCRIPT =============================
Probe Firmware: DAPLink CMSIS-DAP (ARM)
Serial Number: 0227000047784e4500289004d745003addb1000097969900
VID:PID: 0D28:0204
USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#7&cc7afd2&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
connection failed - Em(01). Cannot find MEM-AP selected by core index (check target power).. Retrying
Using memory from core 0 after searching for a good core
On debug connection - reset using system reset
debug interface type = CoreSight DP (DAP DP ID 0BD11477) over SWD TAP 0
processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 0
number of h/w breakpoints = 8
number of flash patches = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)
ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)
ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)
ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)
ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)
ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)
ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)
ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core
ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT
ROM 1 E0040000: CID B105900D PID 04000BB9A9 CSt type 0x11 Trace Sink - TPIU
ROM 1 E0043000: CID B105F00D PID 04001BB101 Sys (type 0x0)
NXP: MIMXRT1052xxxxB
DAP stride is 1024 bytes (256 words)
XML Error - no license-type XML file 'crt_common.xme' on path.
note - part information contained no product license-type data
Inspected v.2 External Flash Device on SPI MIMXRT1050-EVK_IS25WP064A.cfx
Image 'MIMXRT1050-EVK_IS25WP064A Dec 17 2020 10:04:52'
Connected: was_reset=false. was_stopped=true
Awaiting telnet connection to port 3332 ...
GDB nonstop mode enabled
Opening flash driver MIMXRT1050-EVK_IS25WP064A.cfx
Sending VECTRESET to run flash driver
Flash device supported (8MB = 128*64K at 0x60000000)
Writing 24124 bytes to address 0x60000000 in Flash
Sectors written: 0, unchanged: 1, total: 1
Erased/Wrote sector 0-0 with 24124 bytes in 15msec
Closing flash driver MIMXRT1050-EVK_IS25WP064A.cfx
Flash Write Done
Flash Program Summary: 24124 bytes in 0.01 seconds (1570.57 KB/sec)
============= SCRIPT: CTNxxx_Connect.scp =============
DpID = 0BD11477
APID = 0x04770041
============= END SCRIPT =============================
state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Wait in DAP access
state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Wait in DAP access
following reset read of core registers failed - Ep(08). Cannot access core regs when target running.
Target error from Commit Flash write: Ep(08). Cannot access core regs when target running.
GDB stub (crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.
state - running or following reset request - re-read of state failed - rc Nn(05). Wire ACK Wait in DAP access

I hope someone can help me get through this.

Thanks in advance.

[scottdewey]

In the application note it states the chip does not have to be removed if the board is an EVKB. Is this true?

[FelipeGarcia]

Hi Scott,

Did you remove the onboard Hyper Flash? If not, this will impact the QSPI Flash read and write timing. Please check the application note below that explains this process in detail.

https://www.nxp.com/docs/en/application-note/AN12108.pdf

Best regards,

Felipe

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[scottdewey]

The NXP support response of using AN12108 was of no help. I did receive some guidance from a different NXP source. The fix is below:

so apparently the guide does not mention that there needs to be a software modification. You need to go into the evkbimxrt1050_flexspi_nor_config.c, contained in the XIP directory; then you need to modify the configuration struct:

const flexspi_nor_config_t hyperflash_config = {...}

Add this code:

const flexspi_nor_config_t qspiflash_config = {
    .memConfig =
        {
            .tag              = FLEXSPI_CFG_BLK_TAG,
            .version          = FLEXSPI_CFG_BLK_VERSION,
            .readSampleClksrc=kFlexSPIReadSampleClk_LoopbackFromDqsPad,
            .csHoldTime       = 3u,
            .csSetupTime      = 3u,
            .sflashPadType    = kSerialFlash_4Pads,
            .serialClkFreq    = kFlexSpiSerialClk_100MHz,
            .sflashA1Size     = 8u * 1024u * 1024u,
            .lookupTable =
                {
                    // Read LUTs
                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
                },
        },
    .pageSize           = 256u,
    .sectorSize         = 4u * 1024u,
    .blockSize          = 64u * 1024u,
    .isUniformBlockSize = false,
};

I have attached the working code.