Problem debugging on iMX.RT1052 using LPC-Link2

[edw8]

I have an SDK demo project that programs on an iMX.RT1052 target when using a MIMXRT1050-EVK as a debug probe. I am able to then debug using MCUXpresso IDE v10.2.1 as well as run thru the GUI flash tool embedded within MCUXpresso IDE to mass erase the quadspi flash attached to the device. 

I am trying to get to the same point using an LPC-Link2 instead of the MIMXRT1050-EVK. I downloaded LPCScrypt and programmed what I believe is the latest firmware on the probe:

Booting LPCScrypt target with "LPCScrypt_218.bin.hdr"

LPCScrypt target booted

.

Programming LPC-Link2 with "LPC432x_CMSIS_DAP_V5_183.bin.hdr"

- LPC-Link2 programmed successfully and has the unique ID: I3FUBTOQ

- To use: make link JP1 (nearest USB) and reboot.

When I attach the probe to my target and attempt to enter debug mode, however, I get the following wire ACK fault:

MCUXpresso IDE RedlinkMulti Driver v10.2 (Jul 25 2018 11:25:37 - crt_emu_cm_redlink build 555)

Found chip XML file in C:/Users/Edw/Documents/Holodeck/VboxShared/f8-sandbox/staging_wdm-ucmrt_core_testbed/playground/uCM-RT-TB_flexspi_nor_polling_transfer/Debug\MIMXRT1052xxxxB.xml

Reconnected to existing link server

Connecting to probe 1 core 0:0 (using server started externally) gave 'OK'

Probe Firmware: LPC-LINK2 CMSIS-DAP V5.183 (NXP Semiconductors)

Serial Number:  I3FUBTOQ

VID:PID:  1FC9:0090

USB Path: \\?\hid#vid_1fc9&pid_0090&mi_00#11&2b2fe572&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}

Using memory from core 0:0 after searching for a good core

debug interface type      = Cortex-M7 (DAP DP ID 0BD11477) over SWD TAP 0

processor type            = Cortex-M7 (CPU ID 00000C27) on DAP AP 0

number of h/w breakpoints = 8

number of flash patches   = 0

number of h/w watchpoints = 4

Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>

Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.

Content of CoreSight Debug ROM(s):

RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)

ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)

ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)

ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)

ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)

ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)

ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)

ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core

ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT

ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU

ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)

Non-standard DAP stride detected - 1024 bytes

NXP: MIMXRT1052xxxxB

Connected: was_reset=true. was_stopped=false

Awaiting telnet connection to port 3330 ...

GDB nonstop mode enabled

After error Nn(05). Wire ACK Fault in DAP access -

Failed to read address register in DAP - Nn(05). Wire ACK Fault in DAP access

Target error from Write Memory: Em(17). Debug port inaccessible after access at location 0x20000800

GDB stub (crt_emu_cm_redlink) terminating - GDB protocol problem: Pipe has been closed by GDB.

error closing down debug session - Nn(05). Wire ACK Fault in DAP access

I tried this with JP1 on my LPC-Link2 both open and closed. My target is self powered so I have JP2 open.

Would appreciate any advice on how to get past this issue.

[edw8]

Thanks for the reply!

My target is not an EVK board, rather an RT1052 running on our own PCB. We had used an EVKA board's K20 and SWD facets to debug the RT1052 target previously while disconnected from the RT1052 on the EVKA.

In any case, your recommendation for JP2 did the trick. Shorting that jumper allows the LPC-Link2 to connect to the RT1052 target and program the demo project. I tested both ram and flash based demos with positive outcomes. I did not need to use the connect scripts, but good to know they are there.

[lpcxpresso_supp · Accepted solution]

v5._183 is indeed to current version of the LPC-Link2 NXP CMSIS-DAP firmware. MCUXpresso IDE will actually soft load the Link2 firmware if a jumper is not fitted to JP1, though proprogramming with LPCScrypt will save a small amount of time each time you power cycle the probe.

Anyway, I would strongly suggest that you check the latest version of our document on using MCUXpresso IDE with the RT1050 EVK which we reissued a couple of weeks ago - Overview of using the MIMXRT1050-EVK(B) with MCUXpresso IDE 

But in particular, in my experience ...

• Make sure JP2 is connected on your LPC-Link2, as the EVK doesn't seem to reliably provide power back to the Link2 over VTREF to power its buffers (see Design Considerations for Debug).
• Remove J32 and J33 on your EVK board to disconnect the onboard probe
• Power up the LPC-Link2 after powering up the EVK board

You may also want to try using the Connect script provided with the Overview document.

Regards,

MCUXpresso IDE Support