Can't Debug LPC55s14 over SWD

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Can't Debug LPC55s14 over SWD

3,228 次查看
toblerone
Contributor I

Was able to debug once with LPC link2 but now I cant.

Error Message:

MCUXpresso IDE RedlinkMulti Driver v11.4 (Jul 2 2021 12:03:47 - crt_emu_cm_redlink build 1)
Found chip XML file in C:/Users/**********/Documents/MCUXpressoIDE_11.4.0_6224/workspace/DebugTry1/Debug\LPC55S14.xml
Reconnected to existing LinkServer process.
Probe Firmware: LPC-LINK2 CMSIS-DAP V5.361 (NXP Semiconductors)
Serial Number: FTCSPWAU
VID:PID: 1FC9:0090
USB Path: \\?\hid#vid_1fc9&pid_0090&mi_00#8&6b3749d&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
Using memory from core 0 after searching for a good core
processor is in secure mode
debug interface type = CoreSight DP (DAP DP ID 6BA02477) over SWD TAP 0
processor type = Cortex-M33 (CPU ID 00000D21) on DAP AP 0
number of h/w breakpoints = 8
number of flash patches = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 6BA02477. CpuID: 00000D21. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FE000: CID B105100D PID 0000095000 ROM (type 0x1)
ROM 1 E00FF000: CID B105100D PID 04000BB4C9 ROM (type 0x1)
ROM 2 E000E000: CID B105900D PID 04000BBD21 CSt ARM ARMv8-M type 0x0 Misc - Undefined
ROM 2 E0001000: CID B105900D PID 04000BBD21 CSt ARM DWTv2 type 0x0 Misc - Undefined
ROM 2 E0002000: CID B105900D PID 04000BBD21 CSt ARM FPBv2 type 0x0 Misc - Undefined
ROM 2 E0000000: CID B105900D PID 04000BBD21 CSt ARM ITMv2 type 0x43 Trace Source - Bus
ROM 1 E0040000: CID B105900D PID 04000BBD21 CSt type 0x11 Trace Sink - TPIU
NXP: LPC55S14
DAP stride is 1024 bytes (256 words)
Inspected v.2 On chip Flash memory using IAP lib LPC551x.cfx
Image 'LPC551x Jul 12 2021 22:05:09'
Opening flash driver LPC551x.cfx
Sending VECTRESET to run flash driver
Flash variant 'LPC551x (128KB)' detected (128KB = 4*32K at 0x0)
Closing flash driver LPC551x.cfx
Connected: was_reset=true. was_stopped=false
Awaiting telnet connection to port 3330 ...
GDB nonstop mode enabled
Opening flash driver LPC551x.cfx (already resident)
Sending VECTRESET to run flash driver
Flash variant 'LPC551x (128KB)' detected (128KB = 4*32K at 0x0)
Writing 11248 bytes to address 0x00000000 in Flash
request to clear DAP error failed - status 255
After error Ee(83). Hardware Transfer Error -
Failed to read address register in DAP - Ee(FF). Redlink interface error 255.
failed to send op ProgramPage message - rc Em(17). Debug port inaccessible after access at location 0x30006800
Sectors written: 1, unchanged: 0, total: 1
Closing flash driver LPC551x.cfx
failed to send op Terminate message - rc Ee(FF). Redlink interface error 255.
Target error from Commit Flash write: Ee(FF). Redlink interface error 255.

I've tried booting into ISP mode, mass erasing from the GUI tool, and using external power.

Thanks

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3,206 次查看
toblerone
Contributor I

The chip became locked after using mass erase from the GUI tool. I was able to unlock it by using Flash magic to program it over UART.

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello toblerone,

"The chip became locked after using mass erase from the GUI tool."

->How do you know it locked after mass erase?

Does it can debug now after program using Flash magic?

 

BR

Alice

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3,193 次查看
toblerone
Contributor I

Hi Alice_Yang,

I was able to repeat the issue with my custom board and with the LPC55s16 EVK dev board when using an external probe(LPC link 2). On the EVK dev board, using the on board probe would unlock the chip and allow debugging again. On my custom board, isp over uart through flash magic did unlock the chip and allow debugging again.

Thanks

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3,183 次查看
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello toblerone,

It is possible to download an image into the flash on the target that will then prevent any further debug access or connections. The classic cases of this are:

 

  • The image contains code that sets the MCU clocks up "incorrectly".
  • The image contains code that enables a watchdog timer.
  • The image contains code that puts the MCU into a very low power mode.
  • The image contains code that "switches off" some, or all of the multiplexed debug pins (JTAG/SWD).

Detail refer to:

https://community.nxp.com/t5/LPCXpresso-IDE-FAQs/Regaining-debug-access-to-target-MCU/m-p/473923  

 

BR

Alice

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