Hi,
I've set up SCTIMER2 to run at 20nSecs/tick. I'm using match channel 0 to generate an interrupt every 1 mSec, for now. Counter counts up at 20nS, match occurs at 1mS, resets the counter, generate an interrupt, rinse repeat. Eventually I need to output a SPI xfer every 14.76uSecs. But 1st I was checking to see if the ISR trips. It does but, there's jitter of about 100uSecs! I have only 1 interrupt enabled, (checked ISER0 & 1). Core running at 150MHz. No atomic sections of code. Below is the isr code, printf only occurs if get interrupt from another source. None occur.

I don't think there's anything in there that would cause 100uS of jitter. I've checked, on a scope, the number of interrupts are correct over a long period of time, which means it's not drifting/accumulating the error. It's just jittering from one isr to the next. I suspect it's the over head of context switching?
Questions;
Is this normal?
Is there a way to reduce this?
If I use DMA, instead of an ISR, to start the SPI xfer, will the jitter still be there? If so I'll need another way to do this. Because 100uS of jitter swamps out the 14.74uS period of SPI updates.
Thanks in advance,
Jeff