Detailed explanation of the export file csv_output.csv

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Detailed explanation of the export file csv_output.csv

Contributor II

We have a product (IO Checker) to verify that an FPGA is correctly connected on a custom board. (Comparing FPGA pin reports with the schematic/board netlist in an intelligent way)

We would like to do the same for micro processors and for NXP the csv_output.csv from the MCUXpresso-Config-Tools seems a viable solution. However the contents of this file is not a 100% clear to me.

Is there additional information I get get, or can you bring me in to contact with a NXP engineer would could tell me more ?

With kind regards,

Willem Gruter, HDL Works

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4 Replies

Contributor II

Hello Edwin,

thanks for the reply.
However the more I look at the CSV file generated the less I understand what is in the columns.

In your example the 'Label' and 'Identifier' columns are always empty (also when routing signals).
One of my examples is based on the MIMXRT1170-EVK.mex file, which I think, belongs to the corresponding evaluation board.
Initially the Label' and 'Identifier' columns are empty as well, but after routing signals, most of them contain data form the routed signals (and the data we are interested in).
So why the difference. Can this be based on user input ?

Is is possible the the exported CSV file differs depending on the selected device ?
(I understand it differs depending on the routing).

With kind regards,

Willem Gruter, HDL Works.

NXP Employee
NXP Employee

Hi @WillemGruter,

when you create a new configuration for processor, labels and identifiers are empty. And they stay empty even after routing. The user has to set them manually.

When a new configuration is created for a board, it's a different scenario. Board configurations are pre-configured by NXP, including labels and identifiers. Routing/unrouting a pin should not affect its label nor identifier which you can also see in Pins view.

William obviously used a new configuration for processor. That's why labels were empty in his case.

You say that you started from the board configuration and labels and identifiers were empty until some routing was done. Which is quite strange to me. Could you tell me:

  • How exactly you started? Did you create a new board configuration by using File->New or you opened directly the board mex file?
  • What version of tools are you using? Is it the latest version 11 or some older?
  • Are you using stand alone Config Tools or integrated in MCUXpresso IDE?

Best regards,

Tomas Klir

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Contributor II

Hello @tomasklir,

I use almost the latest version:


and I just updated.
I tried various approaches so I don't exactly recall what I did, but I have a file named MIMX8M-EVK-REV-B.mex which has routing (not done by me), but can't remember where got it from.
It doesn't contain identifiers/labels.
But don't spend time on it, it is probably my lack of knowledge.

But I now understand that the projects starting with a board contain much more information.
In principle our target is a user that places a microprocessor on it own board.
At some point the schematic/board designer has to verify the connectivity of the processor.

I found that first table has a number of last columns named 'Routing for...' which seem to contain the information useful for us (after removing the contents between brackets).
Its not yet clear of the "Identifier" column is also useful.

If you like I can send you some screenshots of what we are doing in verification (or the preliminary brochure).

Thanks, Willem

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NXP TechSupport
NXP TechSupport

Hi @WillemGruter,

The first part of the csv_output.csv file provides a table of all the pins in a package as well as all of their supported functions, similar to what you would find in the datasheet of the MCU. In this example of a LPC54608J512ET180, pin A1 has the name CAN1_TD, and can be set up as a GPIO pin with name PIO0_1, as a FLEXCOMM pin with name FC3_CTS_SDA_SSEL0, as a CTIMER pin with name CTIMER0_CAP0, etc.




Then below this table, there is another section that describes only the pins that are routed as well as their respective configurations. In this case, I enabled some ADC0, CAN1, DMA0, FLEXCOMM0 and FLEXCOMM9 pins and this section describes all of the information of each routed pin for their specific function.




I hope this helps,



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