Clocks tool limits SDIO clocks to 50MHz for RT595

[jacobvecht]

The clocks tool in Config tools V 24.12 limits the clock for SDIO0 to 50MHz max but I want 200MHz to use the fast MMC modes. Is this a bug in the clocks tool or a real limitation?

 

[jacobvecht]

Edwin: I am sorry but you answer does not help.  The RT500 is specified to be compatible with SD card specification 3.0. I cannot understand why the SD specification 1.1 is quoted in the reference manual. Table 47 of the data sheet for RT500 shows that the clock required for HS400 mode is 200MHz, not 50MHz. Can someone please explain how to enter the HS400 mode? 

 

[EdwinHz]

Hi @jacobvecht,

As you can see in the "conditions" column, the 200MHz clock is supplied to the SD_CLK signal, it is not the root clock for the SDMMC module.

[jacobvecht]

The SD_CLK signal is an output that goes to an external MMC memory; the 200MHz is not supplied externally to that pin. Can the RT595 really put out 200MHz on this pin if the clock fed to the SD/MMC peripheral is only 50MHz? I do not see any documentation of a PLL (or other frequency multiplier) inside the SD/MMC peripheral that could generate 200MHz from 50MHz. Where is there any documentation that implies that the SD_CLK frequency can be higher than the base frequency? How does the RT595 generate 200MHz on its SD_CLK outputs; what clock configuration is needed to make that happen?

[marek_neuzil]

Hello,

I have checked the internal documentation and it seems that the MCU specific frequency limits are missing in the RM. Let me verify the correct frequency limits of the SDIO0 and SDIO1 peripherals for the i.MX RT595 MCU. The RT595 clock model will be fixed when the frequency limits are confirmed.

Best Regards,

Marek Neuzil

[jacobvecht]

To Marek Neuzil:

Please update this forum as to what you have found regarding the range of clock speeds for the eMMC peripheral in the RT595.

[marek_neuzil]

Hello,

I am sorry for the delay. I have urged the response but I am still waiting for the resolution provided by the design team of the RT595 MCU because there is a gap in the datasheet.

Best Regards,

Marek Neuzil

[jacobvecht]

Thanks for agreeing to look into this; I am pretty sure that something needs to be corrected, and it sounds like you are too. Please do not forget to update this forum once you establish the correct clock specifications; I am waiting for your answer in order to give the go-ahead for a whole project.

[marek_neuzil · Accepted solution]

Hello,

The SDIO0 and SDIO1 clock output frequency limits will be fixed in the upcoming release. The SDIO0 frequency limit shall be 400 MHz and SDIO1 208 MHz.

Best Regards,

Marek Neuzil

[EdwinHz]

Hi @jacobvecht,

According to the SD Physical Specification, the max SD clock frequency is 50MHz, which matches the clock config tool max config. You can find this in the chapter 50.5.5 [SYS_CTRL[DVS]] of RT500 RM. 

The RT500 SDK provides software code to switch the MMC timing to the different high-speed modes:

BR,
Edwin.