ls1088ardb emmc HS200 mode error

[zeroqruel]

Hello experts, I need support urgently.

I have ls1088ardb based custom board. The only difference from the reference design is that we use 128GB emmc. We u"se two different boot. One is SD, the other is NOR(qspi). SD/eMMC transition is done by CPLD according to SD Detect pin. If SD is inserted, u-boot is opened via SD card, if not inserted, via NOR. Also, when SD is not inserted, eMMC is activated as 8-bit. In short;
SD DetectPin active: Uboot from SD and SD Card init
SD DetectPin passive: Uboot from NOR, and eMMC init
All these parts are done successfully. When I want to run eMMC in HS200 mode, I get an error and eMMC is running at 52MHz.

U-boot HS200 support config opened:
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_SPL_MMC_HS200_SUPPORT=y

u-boot dtsi;
	esdhc: esdhc@2140000 {
		compatible = "fsl,esdhc";
		reg = <0x0 0x2140000 0x0 0x10000>;
		interrupts = <0 28 0x4>; /* Level high type */
		little-endian;
		bus-width = <8>;
	};
dts;
&esdhc {
	status = "okay";
	compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
	non-removable;
	bus-width = <8>;
	mmc-hs200-1_8v;
	clock-frequency = <200000000>;
};

kernel dtsi;
		esdhc: esdhc@2140000 {
			compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
			reg = <0x0 0x2140000 0x0 0x10000>;
			interrupts = <0 28 0x4>; /* Level high type */
			clock-frequency = <0>;
			voltage-ranges = <1800 1800 3300 3300>;
			sdhci,auto-cmd12;
			little-endian;
			bus-width = <8>;
			status = "okay";
		};

kernel dts;
&esdhc {
	status = "okay";
	compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
	non-removable;
	bus-width = <8>;
	mmc-hs200-1_8v;
	clock-frequency = <200000000>;
};

When I add the "mmc-hs200-1_8v;" feature to both uboot and kernel dts, I get an error.
Uboot errors;
esdhc_change_pinstate 4 error
esdhc_set_timing error -22

=> mmcinfo                                                                                                                                                                                                                          
esdhc_change_pinstate 4 error                                                                                                       
esdhc_set_timing error -22                                                                                                          
Device: FSL_SDHC                                                                                                                    
Manufacturer ID: 13                                                                                                                 
OEM: 14e                                                                                                                            
Name: 0IM20                                                                                                                         
Bus Speed: 52000000                                                                                                                 
Mode : MMC High Speed (52MHz)                                                                                                       
Rd Block Len: 512                                                                                                                   
MMC version 5.1                                                                                                                     
High Capacity: Yes                                                                                                                  
Capacity: 118.6 GiB                                                                                                                 
Bus Width: 8-bit                                                                                                                    
Erase Group Size: 512 KiB                                                                                                           
HC WP Group Size: 32 MiB                                                                                                            
User Capacity: 118.6 GiB WRREL                                                                                                      
Boot Capacity: 31.5 MiB ENH                                                                                                         
RPMB Capacity: 4 MiB ENH  

kernel error:

dmesg | grep mmc                                                                                
[    1.581730] mmc0: SDHCI controller on 2140000.esdhc [2140000.esdhc] using ADMA 64-bit                                            
[    1.778072] mmc0: Tuning timeout, falling back to fixed sampling clock                                                           
[    1.783469] mmc0: tuning execution failed: -110                                                                                  
[    1.783478] mmc0: error -110 whilst initialising MMC card                                                                        
[    3.173735] mmc0: Tuning timeout, falling back to fixed sampling clock                                                           
[    3.174387] mmc0: tuning execution failed: -110                                                                                  
[    3.174405] mmc0: error -110 whilst initialising MMC card                                                                        
[    3.347129] mmc0: Tuning timeout, falling back to fixed sampling clock                                                           
[    3.347876] mmc0: tuning execution failed: -110                                                                                  
[    3.347886] mmc0: error -110 whilst initialising MMC card                                                                        
[    3.559183] mmc0: Tuning timeout, falling back to fixed sampling clock                                                           
[    3.560100] mmc0: tuning execution failed: -110                                                                                  
[    3.560116] mmc0: error -110 whilst initialising MMC card                                                                        
[   18.973289] /dev/mmcblk0p1: Can't open blockdev

 Note: EVDD and OVDD are 1.8V (Verification was done with an oscilloscope)

When I remove the "mmc-hs200-1_8v;" feature, the kernel successfully init emmc. 

/sys/kernel/debug/mmc0# cat ios                                                                                         
clock:          52000000 Hz                                                                                                         
actual clock:   50000000 Hz                                                                                                         
vdd:            21 (3.3 ~ 3.4 V)                                                                                                    
bus mode:       2 (push-pull)                                                                                                       
chip select:    0 (don't care)                                                                                                      
power mode:     2 (on)                                                                                                              
bus width:      3 (8 bits)                                                                                                          
timing spec:    1 (mmc high-speed)                                                                                                  
signal voltage: 0 (3.30 V)                                                                                                          
driver type:    0 (driver type B)

Are there any missing/faulty settings? In my research on the forum, I saw parameters like "pinctrl-names", "pinctrl-0" "pinctrl-1" on the dts side. Do I need to add such parameters to dts? Because the error on the uboot side is related to pinctl? I couldn't see any example. I need your help on this issue.

[LFGP]

dear @zeroqruel,
change the property
sdhci,auto-cmd12;
for
sdhci,auto-cmd21;

[zeroqruel]

Hello @LFGP, thank you for reply.

After adding the line SDHC1_DIR_PMUX=4 to the rcw file, I got an error during compilation

 Building RCW ...
....
Error: Unknown bitfield SDHC1_DIR_PMUX

I did not come across such a definition like "SDHC1_DIR_PMUX" among the RCW(0-1023) field names in the reference manual. When I looked at the forum, I saw that this definition is generally valid for lx2xxx series processors. I am using ls1088a-rdb processor, so I am getting error. 

[LFGP]

Dear @zeroqruel,
please verify that you have added the next config in the RCW
SDHC1_DIR_PMUX=4

and please set
bus-width = <4>;
mmc-hs200-1_8v;

remove the next line:
clock-frequency = <200000000>;

let me know the results please