ls1021 FTM chain configuration and HW signal synchronization

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ls1021 FTM chain configuration and HW signal synchronization

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Contributor III

1- I am trying to understand how FTM chaining works, synchronisation between FTM. In particular,  I do not understand the following sentence from the reference manual:

Connecting CH7 output of FlexTimer-B to PHA input of FlexTimer-A.

It refers to connecting channel 7 of FlexTimer-B (FTM5-8). Unfortunately, FTM5-8 only have CH0,1. So, is there a problem with the documentation?

2- I would like to reset the FTM counter to the CNTIN value via hardware FTM7_CH1 on the ls1021aiot target board. Relating the hardware signal to the trigger event is not clear.  So far, the coding of this feature was unsuccessful. However, I was able to get C1V to change according to the FTM7_CH1.

MY_FLEX_TIMER_SETBIT_4 (ftmVirtAddr[DEV_TO_USE], FSL_LS1021A_OFFSET_FTM_SYNCONF,

      FSL_LS1021A_VALUE_SYNCONF_RW_SYNCMODE | FSL_LS1021A_VALUE_SYNCONF_RW_HWRSTCNT | FSL_LS1021A_VALUE_SYNCONF_RW_HWRWBUF | FSL_LS1021A_VALUE_SYNCONF_RW_HWTRIGMODE);

MY_FLEX_TIMER_SETBIT_4 (ftmVirtAddr[DEV_TO_USE], FSL_LS1021A_OFFSET_FTM_SYNC, FSL_LS1021A_VALUE_SYNC_RW_TRIG1);

here is the state of the registers after the code runs:

  0 Status And Control             (FTM_SC       ), Ptr:0x22051000, Value:0x48000000 PS=0 Clks=01 TOE=1

  4 Counter                        (FTM_CNT      ), Ptr:0x22051004, Value:0x4b340000 X

  8 Modulo                         (FTM_MOD      ), Ptr:0x22051008, Value:0x983a0000 15000

12 Channel (n) Status And Control (FTM_C0SC     ), Ptr:0x2205100c, Value:0x28000000 MSnB, ELSnB

16 Channel (n) Value              (FTM_C0V      ), Ptr:0x22051010, Value:0x4c1d0000 X

20 Channel (n) Status And Control (FTM_C1SC     ), Ptr:0x22051014, Value:0x44000000 CHIE, ELSnA

24 Channel (n) Value              (FTM_C1V      ), Ptr:0x22051018, Value:0xb4360000 X

28 Channel (n) Status And Control (FTM_C2SC     ), Ptr:0x2205101c, Value:0x00000000

32 Channel (n) Value              (FTM_C2V      ), Ptr:0x22051020, Value:0x00000000

36 Channel (n) Status And Control (FTM_C3SC     ), Ptr:0x22051024, Value:0x00000000

40 Channel (n) Value              (FTM_C3V      ), Ptr:0x22051028, Value:0x00000000

44 Channel (n) Status And Control (FTM_C4SC     ), Ptr:0x2205102c, Value:0x00000000

48 Channel (n) Value              (FTM_C4V      ), Ptr:0x22051030, Value:0x00000000

52 Channel (n) Status And Control (FTM_C5SC     ), Ptr:0x22051034, Value:0x00000000

56 Channel (n) Value              (FTM_C5V      ), Ptr:0x22051038, Value:0x00000000

60 Channel (n) Status And Control (FTM_C6SC     ), Ptr:0x2205103c, Value:0x00000000

64 Channel (n) Value              (FTM_C6V      ), Ptr:0x22051040, Value:0x00000000

68 Channel (n) Status And Control (FTM_C7SC     ), Ptr:0x22051044, Value:0x00000000

72 Channel (n) Value              (FTM_C7V      ), Ptr:0x22051048, Value:0x00000000

76 Counter Initial Value          (FTM_CNTIN    ), Ptr:0x2205104c, Value:0x00000000

80 Capture And Compare Status     (FTM_STATUS   ), Ptr:0x22051050, Value:0x01000000 CH0F

84 Features Mode Selection        (FTM_MODE     ), Ptr:0x22051054, Value:0x05000000 WPDIS FTMEN

88 Synchronization                (FTM_SYNC     ), Ptr:0x22051058, Value:0x71000000 TRIG0 TRIG1 TRIG2 CNTMIN

92 Initial State Channels Output  (FTM_OUTINIT  ), Ptr:0x2205105c, Value:0x00000000

96 Output Mask                    (FTM_OUTMASK  ), Ptr:0x22051060, Value:0x00000000

100 Function For Linked Channels   (FTM_COMBINE  ), Ptr:0x22051064, Value:0x00000000

104 Deadtime Insertion Control     (FTM_DEADTIME ), Ptr:0x22051068, Value:0x00000000

108 FTM External Trigger           (FTM_EXTTRIG  ), Ptr:0x2205106c, Value:0x00000000

112 Channels Polarity              (FTM_POL      ), Ptr:0x22051070, Value:0x00000000

116 Fault Mode Status              (FTM_FMS      ), Ptr:0x22051074, Value:0x00000000

120 Input Capture Filter Control   (FTM_FILTER   ), Ptr:0x22051078, Value:0x00000000

124 Fault Control                  (FTM_FLTCTRL  ), Ptr:0x2205107c, Value:0x00000000

128 Quadrature Decoder Ctrl&Status (FTM_QDCTRL   ), Ptr:0x22051080, Value:0x00000000

132 Configuration                  (FTM_CONF     ), Ptr:0x22051084, Value:0x00000000

136 FTM Fault Input Polarity       (FTM_FLTPOL   ), Ptr:0x22051088, Value:0x00000000

140 Synchronization Configuration  (FTM_SYNCONF  ), Ptr:0x2205108c, Value:0x81000300 SYNCMODE HWTRIGMODE HWRSTCNT HWWRBUF

144 FTM Inverting Control          (FTM_INVCTRL  ), Ptr:0x22051090, Value:0x00000000

148 FTM Software Output Control    (FTM_SWOCTRL  ), Ptr:0x22051094, Value:0x00000000

152 FTM PWM Load                   (FTM_PWMLOAD  ), Ptr:0x22051098, Value:0x00000000

Is there an application note for the ls1021 flex timer or processor family?

Thank you

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NXP TechSupport
NXP TechSupport

Here are copies of your questions and  the response  for each question  below:

Q1) the following sentence from the LS1021A reference manual:
"Connecting CH7 output of FlexTimer-B to PHA input of FlexTimer-A."
It refers to connecting channel 7 of FlexTimer-B (FTM5-8). Unfortunately,
FTM5-8 only have CH0,1

A1) FTM 5-8, Ch 0 and Ch 1 will be seen at the pads as outputs. However, Ch7
is internally connected for chaining functionality and will not be seen at I/O
Level.

Q2) Is there an application note for the ls1021 flex timer or processor
family?

A2) Sorry no application note on LS1021A wrt FTM

Q3) a)  How FTM chaining works, synchronization between FTM. For example, in
FTM chaining, it is not clear how functions are spread over the registers of
the 2 FTM?

A3) Taking an example of Flextimer 5 chained with Flextimer 1, Flextimer 1 is
used in quadrature decoder mode which takes Pha and Phb as inputs for
increment and decrement. Pha is connected to ch7 output of FTM5.  We usually
use FTM5 in ePWM mode that toggles its channel output once the counter expires
and the toggling of channel output makes the counter inside FTM 1 to increment
or decrement. This way we have combined the two 16 bit counters to 32 bit
counters with LSBs as FTM5 counter and MSBs as FTM1 counter.

Q4) Do I have access to 10 channels (or 2 or 8 or 2 8)?

A4) You only have access to two channels which can be driven onto the pads.
Rest of the channels are either not connected or are used for functionalities
such as FTM chaining.

Q5) Where do I write the modulo value (in the one register, which FTM; or
2 separate register)?

A5) Since, FTM1 will be run in quadrature decoder mode and FTM5 in ePWM mode,
Both the FTMs need the modulo values. Their values can be varied and depends
entirely on your requirement.

Q6) Which FTM becomes the least significant or most significant? Are there
some limitation in functionality?

A6) Explained in "A3" above.

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NXP TechSupport
NXP TechSupport


Have a great day,

There is application note “Features of the FlexTimer Module”

http://cache.nxp.com/files/32bit/doc/app_note/AN5142.pdf

There are also several applications note related to the FlexTimer using cases. See for example

"Configuring the FlexTimer for Position and Speed Measurement with an Encoder"

http://cache.nxp.com/files/32bit/doc/app_note/AN4381.pdf

However there is not document which describes flextimer modules chaining properly. For sure “CH7” is misprint in the reference manual. I see you added chain question in the case. It is in progress.

> I would like to reset the FTM counter to the CNTIN value via hardware FTM7_CH1

Unfortunately I do not understand what do you want to get.

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Contributor III

Using the rising edge of an input signal on the FTM7_CH1 pin, I would like to be able to reset the FTM7_CNT back to the FTM7_CNTIN value (In my case, FTM7_CNTIN = 0).

I looked at the AN5142 and reviewed related example. There is a K40 register call SOPT4 for which there does not seem to be an equivalent in ls1021a.

I guess the basic question is: Where does a hardware trigger comes from? Can it be configured and how? How do you know which TRIG (1,2,3) the hardware trigger is it related to?

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