I was unaware a version of the release notes would pop up on a web search... That said the document I found doesn't appear to cover the BHR ASK, at least not directly.
My frustration is that short conversation with a NXP applications engineer would at least get us pointed in the right direction, but there are multiple dimensions to the problem including ITAR and matters we consider proprietary as we move from an existing solution based on TI potentially towards NXP.
The package which appears to be best focused on our requirements is the broadband home router (BHR) kit given the inclusion of IPSec. That said how much of the BHR ASK implementation uses the hardware acceleration? One can infer some from the block diagram on the NXP web site, but I don't want to look stupid recommending moving forward internally if it isn't something that directly helps cut our development time.
I have the RDB board in hand, where I bypassed the FRWY card for two reasons. The older card is in the process of getting replaced though apparently the updated card is impossible to buy at this time. Second the ASK specifically cited the RDB board. Ultimately we need to implement our (custom) solution where either the RDB or FRWY is at best a reference design, thus using whatever is supported by the ASK is the path forward for us.
As you cited knowing what is accelerated shouldn't be a matter of flashing the binary code and trying to infer from measured performance if something is accelerated or not. Most (all?) of the documentation appears be behind a wall and I'm still struggling to get answers. I have an executed NDA, though I should push to make it bilateral though again that takes NXP to actually respond. An NDA that should cover simple questions. Short of giving up the source code telling the customer what are the detailed capabilities is not an unreasonable request.