[LX2160A] DDR4 not working normally

[shinhakang]

we successfully performed validation and confirmed that there was no fail. However, I created an expert code and applied it to the source, but ddr does not work normally.

When performing clock validation, we saw that appropriate clock delay values were selected in write leveling and read gate training. What register is this value stored in? We can't see the relevant value in the generated ddr_init.c. For ls1046, wrlvl control register exists - (DDR1_DDR_WRLVL_CNTL/2/3) . However, it does not exist on the lx2160a. If the lx2160a doesn't support it, this test seems meaningless. What should we do? Looking forward to your reply.

Attach log file as below :

log.zip

Thanks

[shinhakang]

Mrudang,

Then,, how about the attached log. We had passed QVSC validation, but not working normally.

Is there any checking point or idea to resolve.

Thanks,

Shinha.

[mrudangshelat-13]

Hi @shinhakang,

LX2160A doesn't require WRLVL_START values. It is done automatically by LX2160A itself. That's the reason the reference manual doesn't have the details.

Regards,
Mrudang