LS2088A: pps-gpio

rams · ‎08-29-2019

Hi,

We are trying to use IRQ04/GPIO3_28 pin for PPS. This pin is connected to FPGA which generates PPS.

We have enabled PPS driver in the kernel device tree

pps {

compatible = "pps-gpio";

gpios = <&gpio2 28 GPIO_ACTIVE_HIGH>;

assert-falling-edge;

};

and

CONFIG_PPS_CLIENT_GPIO in the kernel config.

We are unable to capture interrupts.

The PPS driver is registered.

74960.216582] pps pps1: new PPS source pps.-1
[74960.220861] pps pps1: Registered IRQ 356 as PPS source

But the CPU gets stalled and we do not catch interrupts. The interrupt is registered.

cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
3: 42317212 37580614 40761246 40646651 GICv3 30 Level arch_timer
6: 0 0 0 0 GICv3 23 Level arm-pmu
8: 3053 0 0 0 GICv3 64 Level ttyS0
9: 0 0 0 0 GICv3 45 Level arm-smmu global fault
10: 0 0 0 0 GICv3 46 Level arm-smmu global fault
11: 0 0 0 0 GICv3 47 Level arm-smmu global fault
12: 0 0 0 0 GICv3 48 Level arm-smmu global fault
13: 0 0 0 0 GICv3 243 Level arm-smmu global fault
14: 0 0 0 0 GICv3 244 Level arm-smmu global fault
15: 0 0 0 0 GICv3 245 Level arm-smmu global fault
16: 0 0 0 0 GICv3 246 Level arm-smmu global fault
17: 0 0 0 0 GICv3 247 Level arm-smmu global fault
18: 0 0 0 0 GICv3 248 Level arm-smmu global fault
19: 0 0 0 0 GICv3 249 Level arm-smmu global fault
20: 0 0 0 0 GICv3 250 Level arm-smmu global fault
21: 0 0 0 0 GICv3 178 Level arm-smmu-context-fault
22: 0 0 0 0 GICv3 179 Level arm-smmu-context-fault
23: 0 0 0 0 GICv3 180 Level arm-smmu-context-fault
85: 7094 0 0 0 GICv3 60 Level mmc0
88: 1838786 0 0 0 GICv3 66 Level 2000000.i2c
89: 1276865 0 0 0 GICv3 67 Level 2020000.i2c, 2030000.i2c
91: 0 0 0 0 GICv3 150 Level aerdrv
92: 0 0 0 0 GICv3 155 Level aerdrv
95: 0 0 0 0 GICv3 76 Level 2800000.ftm0
96: 0 0 0 0 GICv3 49 Level [EDAC] MC err
97: 0 0 0 0 GICv3 50 Level [EDAC] MC err
98: 827735591 0 0 0 ITS-fMSI 230000 Edge dpio.3
99: 0 0 0 0 ITS-fMSI 230001 Edge dpio.2
100: 0 0 0 0 ITS-fMSI 230002 Edge dpio.1
101: 0 0 0 0 ITS-fMSI 230003 Edge dpio.0
102: 0 0 0 0 ITS-fMSI 230004 Edge dprc.1
103: 0 0 0 0 ITS-fMSI 230005 Edge dpni.7
104: 1 0 0 0 ITS-fMSI 230006 Edge dpni.6
105: 1 0 0 0 ITS-fMSI 230007 Edge dpni.5
106: 1 0 0 0 ITS-fMSI 230008 Edge dpni.4
107: 1 0 0 0 ITS-fMSI 230009 Edge dpni.3
108: 3 0 0 0 ITS-fMSI 230010 Edge dpni.2
109: 1 0 0 0 ITS-fMSI 230011 Edge dpni.1
110: 1 0 0 0 ITS-fMSI 230012 Edge dpni.0
111: 0 0 0 0 ITS-fMSI 230013 Edge dpmac.8
112: 0 0 0 0 ITS-fMSI 230014 Edge dpmac.7
113: 0 0 0 0 ITS-fMSI 230015 Edge dpmac.6
114: 0 0 0 0 ITS-fMSI 230016 Edge dpmac.5
115: 0 0 0 0 ITS-fMSI 230017 Edge dpmac.4
116: 0 0 0 0 ITS-fMSI 230018 Edge dpmac.3
117: 0 0 0 0 ITS-fMSI 230019 Edge dpmac.2
118: 0 0 0 0 ITS-fMSI 230020 Edge dpmac.1
354: 0 0 0 0 GICv3 151 Level PCIe PME
355: 0 0 0 0 GICv3 156 Level PCIe PME
356: 0 0 0 0 mpc8xxx-gpio 28 Edge pps.-1
IPI0: 33569268 50029802 40483554 40281328 Rescheduling interrupts
IPI1: 170 527 539 468 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
IPI4: 0 0 0 0 Timer broadcast interrupts
IPI5: 0 0 0 0 IRQ work interrupts
IPI6: 0 0 0 0 CPU wake-up interrupts
Err: 0

We have verified that we have pps pulses on the pin. We tried to vary the pulse width, still the behaviour is same. No interrupts and cpu stalls.

Do you have any inputs

yipingwang · ‎08-31-2019

Parallel port interrupt occurs only on high->low transition,so it is used for PPS assert edge.

If the SYSFS filesystem is enabled in the kernel it provides a new class:

$ ls /sys/class/pps/

pps0/ pps1/ pps2/

Every directory is the ID of a PPS sources defined in the system and

inside you find several files:

$ ls -F /sys/class/pps/pps0/

assert dev mode path subsystem@

clear echo name power/ uevent

Inside each "assert" and "clear" file you can find the timestamp and a

sequence number:

$ cat /sys/class/pps/pps0/assert

1170026870.983207967#8

Where before the "#" is the timestamp in seconds; after it is the

sequence number. Please refer to Driving PPS from GPIO . Please refer to Documentation/pps/pps.txt.

rams · ‎09-02-2019

Hi,

We are using 4.14.109 kernel. We are not getting any pps interrupts on mpc8xxx-gpio GPIO 28/IRQ04.

GPIO pin 28 receives PPS pulse from FPGA.

Please find below IRQ information

root@ip-gateway-x20-64:~# cat /sys/kernel/debug/irq/irqs/356
handler: 0xffff000008108750
status: 0x00000002
istate: 0x00000000
ddepth: 0
wdepth: 0
dstate: 0x00400202
IRQ_TYPE_EDGE_FALLING
IRQD_ACTIVATED
IRQD_IRQ_STARTED
node: -1
affinity: 0-3
effectiv:
domain: :soc:gpio@2320000
hwirq: 0x1c
chip: mpc8xxx-gpio
flags: 0x0

cat /sys/kernel/debug/irq/domains/:soc:gpio@2320000
name: :soc:gpio@2320000
size: 32
mapped: 0
flags: 0x00000040

When we insert the pps-gpio kernel module, we rcu_preempt self-detected stall on CPU.

[ 2323.155028] INFO: rcu_preempt self-detected stall on CPU
[ 2323.160349] 0-...: (1 GPs behind) idle=26e/140000000000002/0 softirq=525941/525948 fqs=2478
[ 2323.168874] (t=5250 jiffies g=217334 c=217333 q=5058)
[ 2323.174099] Task dump for CPU 0:
[ 2323.177323] insmod R running task 0 3816 2293 0x0000022a
[ 2323.184375] Call trace:

Is there an issue with GPIO interrupts on LS2088A platform?

rams · ‎09-02-2019

Hi,

I followed the below link to verify the gpio interrupts on pin GPIO3_28

LS1043 GPIO support in Linux SDK

cd /sys/class/gpio/
/sys/class/gpio# echo 444 > export
/sys/class/gpio# echo "out" > gpio444/direction
/sys/class/gpio# echo both > gpio444/edge
[ 1071.799363] gpio gpiochip2: (2320000.gpio): gpiochip_lock_as_irq: tried to flag a GPIO set as output for IRQ
-sh: echo: write error: Input/output error

The IRQ04_BASE[402] is set as 0b1 in RCW.

I wanted to verify the GPIO interrupts as described in the document, but I could not get it to work.

yipingwang · ‎09-03-2019

Please refer to https://community.nxp.com/message/1163713.

Thanks,

Yiping

rams · ‎09-03-2019

Hi,

I have referred all the community posts related to setting up GPIO as interrupt.

The pin is set as GPIO in RCW. I am able to toggle GPIO pin. That is not an issue.

I get following error when I try to setup the edge

/sys/class/gpio# echo both > gpio444/edge

[ 1071.799363] gpio gpiochip2: (2320000.gpio): gpiochip_lock_as_irq: tried to flag a GPIO set as output for IRQ
-sh: echo: write error: Input/output error

I have tested on different GPIO pins, I get the same issue.

Please find below sample example sequence from LS1043 GPIO support in Linux SDK

root@ls1043ardb:/sys/class/gpio/gpio496# echo out > direction

root@ls1043ardb:/sys/class/gpio/gpio496# echo both > edge [ 562.634440] GPIO chip /soc/gpio@2300000: gpiochip_lock_as_irq: tried to flag a GPIO set as output for IRQ

root@ls1043ardb:/sys/class/gpio/gpio496# cat /proc/interrupts | grep 8xxx

70: 1 0 0 0 mpc8xxx-gpio 16 Edge gpiolib, gpiolib

root@ls1043ardb:/sys/class/gpio/gpio496# echo 1 > value

root@ls1043ardb:/sys/class/gpio/gpio496# echo 0 > value

root@ls1043ardb:/sys/class/gpio/gpio496# echo 1 > value

root@ls1043ardb:/sys/class/gpio/gpio496# cat /proc/interrupts | grep 8xxx

70: 4 0 0 0 mpc8xxx-gpio 16 Edge gpiolib, gpiolib

In the above example sequence, it is shown that the GPIO pin GPIO1_16 direction is set as output and edge property is set to be both raising and falling edge. The gpio value is toggled and we can see the interrupts count increasing.

I am trying to test the same on my LS2088A platform. I am unable to set edge property to "both". I always get "-sh: echo: write error: Input/output error".

Could you please clarify why it is not possible to set the edge property ?

Thanks

yipingwang · ‎09-05-2019

Please refer to https://community.nxp.com/message/1180229 .

rams · ‎09-05-2019

Thanks. I have checked the post you have referred. Unfortunately, it doesn't help.

Kindly look into this issue specifically

I tried to investigate this issue. I see that I am unable to use the GPIO as interrupt.

I see rcu_preempt self detected stall on CPU when the interrupt is triggered on the pin.
511.543038] INFO: rcu_preempt self-detected stall on CPU
[ 511.548355] 0-...: (1 GPs behind) idle=8aa/140000000000002/0 softirq=71497/71498 fqs=23502
[ 511.556794] (t=52509 jiffies g=21132 c=21131 q=47123)
[ 511.562019] Task dump for CPU 0:
[ 511.565242] sh R running task 0 2288 1 0x00000223
[ 511.572293] Call trace:
[ 511.574733] [<ffff0000080890d0>] 0xffff0000080890d0
[ 511.579607] [<ffff0000080894a4>] 0xffff0000080894a4
[ 511.584480] [<ffff0000080d9d18>] 0xffff0000080d9d18
[ 511.589353] [<ffff0000080dac48>] 0xffff0000080dac48
[ 511.594228] [<ffff000008117bd4>] 0xffff000008117bd4
[ 511.599102] [<ffff000008116bc8>] 0xffff000008116bc8
[ 511.603975] [<ffff00000811bb94>] 0xffff00000811bb94
[ 511.608848] [<ffff00000812a9ac>] 0xffff00000812a9ac
[ 511.613721] [<ffff00000812aa28>] 0xffff00000812aa28
[ 511.618594] [<ffff00000811c724>] 0xffff00000811c724
[ 511.623467] [<ffff00000811c998>] 0xffff00000811c998
[ 511.628341] [<ffff0000086f6a60>] 0xffff0000086f6a60
[ 511.633214] [<ffff000008109358>] 0xffff000008109358
[ 511.638088] [<ffff000008103ebc>] 0xffff000008103ebc
[ 511.642962] [<ffff000008104544>] 0xffff000008104544
[ 511.647835] [<ffff000008080fb8>] 0xffff000008080fb8
[ 511.652710] Exception stack(0xffff000008003d90 to 0xffff000008003ed0)

I am able to configure the GPIO pins as interrupt. I tested on different GPIO pins.

GPIO4_09 IRQ11 393
echo 393 > /sys/class/gpio/export
echo "in" > /sys/class/gpio/gpio393/direction
echo falling > /sys/class/gpio/gpio393/edge
cat /sys/class/gpio/gpio393/value

GPIO3_29 IRQ05 445
echo 445 > /sys/class/gpio/export
echo "in" > /sys/class/gpio/gpio445/direction
echo falling > /sys/class/gpio/gpio445/edge
cat /sys/class/gpio/gpio393/value

GPIO3_28 IRQ04 444
echo 444 > /sys/class/gpio/export
echo "in" > /sys/class/gpio/gpio444/direction
echo falling > /sys/class/gpio/gpio444/edge
cat /sys/class/gpio/gpio444/value

I do not see any issue when I configure the GPIO pins as interrupt.
I get into trouble when the interrupts are triggered on the pins. If the pins are held at low or high level, I do not see any issue.
I am able to read the values.

Are there any restrictions in LS2088A for using any of the GPIO pins as interrupt?

rams · ‎09-06-2019

Hi,

I have tested the interrupts on LS1043A custom board. It works fine. Interrupt triggering on GPIO pin of LS1043A works fine. Could you please verify the GPIO pins as interrupt on LS2088A by triggering the pin?

LS1043A:  IRQ04/GPIO1_24 GPIO 504 

echo 504 > /sys/class/gpio/export 

echo "in" > /sys/class/gpio/gpio504/direction  

cat /sys/class/gpio/gpio504/value 

echo falling >  /sys/class/gpio/gpio504/edge

cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
1: 0 0 0 0 GIC 29 Edge arch_timer
2: 38874 39263 37357 36997 GIC 30 Edge arch_timer
3: 0 0 0 0 GIC 27 Edge kvm guest timer
9: 0 0 0 0 GIC 25 Edge vgic
10: 0 0 0 0 GIC 75 Level fsl-ifc
11: 4654 0 0 0 GIC 94 Level mmc0
12: 0 0 0 0 GIC 77 Level bman-err, qman-err, fman-err
13: 0 0 0 0 GIC 76 Level fman
15: 1573 0 0 0 GIC 88 Level 2180000.i2c
16: 0 0 0 0 GIC 89 Level 2190000.i2c
17: 10 0 0 0 GIC 90 Level 21a0000.i2c
18: 241 0 0 0 GIC 91 Level 21b0000.i2c
19: 2820 0 0 0 GIC 86 Level serial
25: 0 0 0 0 GIC 118 Level 29d0000.ftm0
28: 0 0 0 0 GIC 92 Level xhci-hcd:usb1
29: 0 0 0 0 GIC 93 Level xhci-hcd:usb3
30: 0 0 0 0 GIC 95 Level xhci-hcd:usb5
31: 0 0 0 0 GIC 101 Level 3200000.sata
32: 0 0 0 0 GIC 184 Level qDMA error
33: 0 0 0 0 GIC 71 Level qDMA queue
34: 0 0 0 0 GIC 159 Level ls-pcie-pme
35: 0 0 0 0 GIC 160 Level aerdrv
36: 0 0 0 0 GIC 193 Level ls-pcie-pme
37: 0 0 0 0 GIC 194 Level aerdrv
43: 0 0 0 0 GIC 214 Level QMan portal 3
44: 0 0 0 0 GIC 216 Level QMan portal 2
45: 0 0 0 0 GIC 218 Level QMan portal 1
46: 0 0 0 0 GIC 220 Level QMan portal 0
52: 0 0 0 0 GIC 215 Level BMan portal 3
53: 0 0 0 0 GIC 217 Level BMan portal 2
54: 0 0 0 0 GIC 219 Level BMan portal 1
55: 0 0 0 0 GIC 221 Level BMan portal 0
68: 0 0 0 0 GIC 152 Level PCIe PME
69: 0 0 0 0 GIC 186 Level PCIe PME
70: 198 0 0 0 mpc8xxx-gpio 24 Edge gpiolib
IPI0: 23611 22443 24024 20702 Rescheduling interrupts
IPI1: 35 103 115 125 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
IPI3: 0 0 0 0 Timer broadcast interrupts
IPI4: 1 0 0 0 IRQ work interrupts
Err: 0

rams · ‎09-10-2019

Hi,

There seems to be an issue with GPIO as interrupt on LS2088A. We managed to reproduce the issue on LS2088A RDB. We modified the RDB so that IRQ04 can be externally triggerred .

Made changes to RCW to configure IRQ04 as GPIO3_28.

We tested on LSDK19.06. There seems to be issue with mpc8xxx-gpio driver for LS2088A.

[root@TinyLSDK ~]$ uname -a

Linux TinyLSDK 4.19.46 #2 SMP PREEMPT Tue Sep 10 10:38:00 UTC 2019 aarch64 GNU/Linux

[root@TinyLSDK ~]$ echo 444 > /sys/class/gpio/export

[root@TinyLSDK ~]$ echo "in" > /sys/class/gpio/gpio444/direction

[root@TinyLSDK ~]$ cat /sys/class/gpio/gpio444/value

1

We are able to readback the changed value.

[root@TinyLSDK ~]$ cat /sys/class/gpio/gpio444/value

0

echo falling > /sys/class/gpio/gpio444/edge

[root@TinyLSDK ~]$ cat /sys/class/gpio/gpio444/value

0

[root@TinyLSDK ~]$ cat /proc/interrupts

CPU0 CPU1 CPU2 CPU3 CPU4 CPU5 CPU6 CPU7

1: 0 0 0 0 0 0 0 0 GICv3 25 Level vgic

3: 1439 808 958 1010 965 963 1556 836 GICv3 30 Level arch_timer

4: 0 0 0 0 0 0 0 0 GICv3 27 Level kvm guest timer

6: 0 0 0 0 0 0 0 0 GICv3 23 Level arm-pmu

8: 671 0 0 0 0 0 0 0 GICv3 64 Level ttyS1

11: 0 0 0 0 0 0 0 0 GICv3 45 Level arm-smmu global fault

12: 0 0 0 0 0 0 0 0 GICv3 46 Level arm-smmu global fault

13: 0 0 0 0 0 0 0 0 GICv3 47 Level arm-smmu global fault

14: 0 0 0 0 0 0 0 0 GICv3 48 Level arm-smmu global fault

15: 0 0 0 0 0 0 0 0 GICv3 243 Level arm-smmu global fault

16: 0 0 0 0 0 0 0 0 GICv3 244 Level arm-smmu global fault

17: 0 0 0 0 0 0 0 0 GICv3 245 Level arm-smmu global fault

18: 0 0 0 0 0 0 0 0 GICv3 246 Level arm-smmu global fault

19: 0 0 0 0 0 0 0 0 GICv3 247 Level arm-smmu global fault

20: 0 0 0 0 0 0 0 0 GICv3 248 Level arm-smmu global fault

21: 0 0 0 0 0 0 0 0 GICv3 249 Level arm-smmu global fault

22: 0 0 0 0 0 0 0 0 GICv3 250 Level arm-smmu global fault

23: 0 0 0 0 0 0 0 0 GICv3 178 Level arm-smmu-context-fault

87: 7 0 0 0 0 0 0 0 GICv3 58 Level 2100000.spi

88: 0 0 0 0 0 0 0 0 GICv3 60 Level mmc0

91: 4073 0 0 0 0 0 0 0 GICv3 66 Level 2000000.i2c

92: 9 0 0 0 0 0 0 0 GICv3 53 Level fsl-ifc

93: 1 0 0 0 0 0 0 0 GICv3 57 Level

96: 0 0 0 0 0 0 0 0 GICv3 165 Level ahci-qoriq[3200000.sata]

97: 0 0 0 0 0 0 0 0 GICv3 168 Level ahci-qoriq[3210000.sata]

98: 1 0 0 0 0 0 0 0 GICv3 112 Level xhci-hcd:usb1

99: 1 0 0 0 0 0 0 0 GICv3 113 Level xhci-hcd:usb3

101: 0 0 0 0 0 0 0 0 GICv3 76 Level 2800000.ftm0

112: 2 0 0 0 0 0 0 0 GICv3 172 Level 8010000.jr

113: 0 0 0 0 0 0 0 0 GICv3 173 Level 8020000.jr

114: 0 0 0 0 0 0 0 0 GICv3 174 Level 8030000.jr

115: 0 0 0 0 0 0 0 0 mpc8xxx-gpio 28 Edge gpiolib

IPI0: 907 940 695 811 682 1050 4144 755 Rescheduling interrupts

IPI1: 4 7 8 9 9 7 7 8 Function call interrupts

IPI2: 0 0 0 0 0 0 0 0 CPU stop interrupts

IPI3: 0 0 0 0 0 0 0 0 CPU stop (for crash dump) interrupts

IPI4: 0 0 0 0 0 0 0 0 Timer broadcast interrupts

IPI5: 0 0 0 0 0 0 0 0 IRQ work interrupts

IPI6: 0 0 0 0 0 0 0 0 CPU wake-up interrupts

Err: 0

When we trigger interrupts, we get stalls on CPUs

[root@TinyLSDK ~]$ [ 122.771222] rcu: INFO: rcu_preempt detected stalls on CPUs/tasks:

[ 122.775217] rcu: INFO: rcu_sched detected stalls on CPUs/tasks:

[ 122.777316] rcu: 0-....: (46 GPs behind) idle=2a2/0/0x1 softirq=1109/1109 fqs=2625

[ 122.777323] rcu: 0-....: (22 GPs behind) idle=2a2/0/0x3 softirq=1109/1109 fqs=2626

[ 122.783231] rcu:

[ 122.790966] rcu:

[ 122.798702] (detected by 3, t=5252 jiffies, g=129, q=110)

[ 122.800704] (detected by 4, t=5252 jiffies, g=-751, q=21)

[ 122.802706] Task dump for CPU 0:

[ 122.808095] Task dump for CPU 0:

[ 122.813484] swapper/0 R

[ 122.816702] swapper/0 R

[ 122.819918] running task

[ 122.822876] running task

[ 122.825834] 0 0 0 0x0000002a

[ 122.825836] Call trace:

[ 122.828880] 0 0 0 0x0000002a

[ 122.828882] Call trace:

[ 122.831934] __switch_to+0xa0/0xe8

[ 122.831937] 0x60000005

[ 122.835940] __switch_to+0xa0/0xe8

[ 122.835943] 0x60000005

yipingwang · ‎09-11-2019

Please give the following patches a try, the second patch is for LS1088, you can apply it manually on LS2088 dts:

diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 8c93dec..fcf93ea 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -365,6 +365,7 @@ static int mpc8xxx_probe(struct platform_device *pdev)
/* ack and mask all irqs */
gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff);
gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);
+ gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR2,0xffffffff);

irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 5a960f9..53a92fe 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -336,6 +336,7 @@
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2300000 0x0 0x10000>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
+ little-endian;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -346,6 +347,7 @@
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2310000 0x0 0x10000>;
interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
+ little-endian;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -356,6 +358,7 @@
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2320000 0x0 0x10000>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
+ little-endian;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
@@ -366,6 +369,7 @@
compatible = "fsl,qoriq-gpio";
reg = <0x0 0x2330000 0x0 0x10000>;
interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
+ little-endian;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
--
1.9.1

LS2088A: pps-gpio

LS2088A: pps-gpio

QorIQ LS2 Devices