I have verified my previously procedure, it works.
I attached my images for you.
Please refer to the following u-boot log.
=> cpld reset altbank
NOTICE: UDIMM 18ASF1G72AZ-2G3B1
NOTICE: 8 GB DDR4, 64-bit, CL=15, ECC on, CS0+CS1
NOTICE: BL2: v1.5(release):LSDK-20.04
NOTICE: BL2: Built : 14:07:13, Nov 19 2020
NOTICE: BL31: v1.5(release):LSDK-20.04
NOTICE: BL31: Built : 14:07:40, Nov 19 2020
NOTICE: Welcome to LS1046 BL31 Phase
U-Boot 2019.10-dirty (Nov 06 2020 - 10:15:29 +0800)
SoC: LS1046AE Rev1.0 (0x87070010)
Clock Configuration:
CPU0(A72):1600 MHz CPU1(A72):1600 MHz CPU2(A72):1600 MHz
CPU3(A72):1600 MHz
Bus: 600 MHz DDR: 2100 MT/s FMAN: 700 MHz
Reset Configuration Word (RCW):
00000000: 0c150010 0e000000 00000000 00000000
00000010: 11335559 40005012 40025000 c1000000
00000020: 00000000 00000000 00000000 00238800
00000030: 20124000 00003000 00000096 00000001
Model: LS1046A RDB Board
Board: LS1046ARDB, boot from QSPI vBank 4
CPLD: V2.3
PCBA: V2.0
SERDES Reference Clocks:
SD1_CLK1 = 156.25MHZ, SD1_CLK2 = 100.00MHZ
DRAM: 7.9 GiB (DDR4, 64-bit, CL=15, ECC on)
DDR Chip-Select Interleaving Mode: CS0+CS1
SEC0: RNG instantiated
Using SERDES1 Protocol: 4403 (0x1133)
Using SERDES2 Protocol: 21849 (0x5559)
NAND: 512 MiB
MMC: FSL_SDHC: 0
Loading Environment from SPI Flash... SF: Detected s25fl512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB
OK
EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net: SF: Detected s25fl512s with page size 256 Bytes, erase size 256 KiB, total 64 MiB
Fman1: Uploading microcode version 106.4.18
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
PCIe2: pcie@3600000 Root Complex: x1 gen1
e1000: 68:05:ca:0f:31:83
FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5, FM1@DTSEC6, FM1@TGEC1, FM1@TGEC2, e1000#0 [PRIME]
Warning: e1000#0 MAC addresses don't match:
Address in SROM is 68:05:ca:0f:31:83
Address in environment is 00:e0:0c:00:69:06
If your problem remains, please provide u-boot log on your target board.