I use ls1046a which is based lsdk2004.
I try to set value of register field which is The PEX PFa error disable register.
May i have the way how to set register filed?
* QorIQ LS1046A Reference Manual, Rev. 2.1, 02/2020
[ Register Info ]
25.5.1.17.1 Offset
Register Offset
PEX_PF0_ERR_DISR 4_0210h
25.5.1.17.2 Function
The PEX PFa error disable register. disables detection of errors in PEX_ERR_DET.
25.5.1.17.3 Diagram
Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
MED
Reserved
PCTD
Reserved
PCACD
Reserved
CDNSCD
Reserved
W
W1C
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
Reserved
UREP
D
Reserved
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
25.5.1.17.4 Fields
Field Function
0
MED
ME: Multiple errors of same type detection disable. 1'b1: Multiple errors of same type detection disabled.
1'b0: Multiple errors of same type detection enabled.
1-7
—
Reserved
8
PCTD
PCTIE: completion detection disable. 1'b1: Completion timeout detection disabled. 1'b0: Completion
timeout detection enabled.
9
—
Reserved
10
PCACD
PCACD: Completer abort detection disable. 1'b1: Completer abort detection disabled. 1'b0: Completer
abort detection enabled.
11
—
Reserved
Solved! Go to Solution.
The register is directly mapped into the processor's address space.
The register address is:
LUT base address + 0x4_0210
PEX1 LUT base address: 348_0000h
PEX2 LUT base address: 358_0000h
PEX3 LUT base address: 368_0000h
(refer to the QorIQ LS1046A Reference Manual, 25.5.1.1 PEX_LUT Memory map).
Also, consider that the register is big-endian (byte swapping is required)
The register is directly mapped into the processor's address space.
The register address is:
LUT base address + 0x4_0210
PEX1 LUT base address: 348_0000h
PEX2 LUT base address: 358_0000h
PEX3 LUT base address: 368_0000h
(refer to the QorIQ LS1046A Reference Manual, 25.5.1.1 PEX_LUT Memory map).
Also, consider that the register is big-endian (byte swapping is required)