LS1046A Asynchronous SError Interrupt on PCIe BAR access

[elszymono]

We are developing a product which consists of Intel Stratix 10 TX FPGA running a PCIe 1.0x1 IP core connected to NXP LS1046 SoC. We were quickly able make the device detectable on the PCIe bus and have access to its PCI configuration space.
cc2 ~ # lspci
0000:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 81c0 (rev 10)
0000:01:00.0 Unassigned class [ff00]: Altera Corporation Device 0000 (rev 01)
0001:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 81c0 (rev 10)
0002:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 81c0 (rev 10)

Unfortunately, we are experiencing problems with accessing the FPGA memory over PCIe. Let me explain our process.

We load the FPGA in u-boot so Linux kernel boot log indicates that the FPGA is detected:
[ 0.089458] layerscape-pcie 3400000.pcie: host bridge /soc/pcie@3400000 ranges:
[ 0.089480] layerscape-pcie 3400000.pcie: IO 0x4000010000..0x400001ffff -> 0x0000000000
[ 0.089493] layerscape-pcie 3400000.pcie: MEM 0x4040000000..0x407fffffff -> 0x0040000000
[ 0.089534] layerscape-pcie 3400000.pcie: iATU unroll: disabled
[ 0.089537] layerscape-pcie 3400000.pcie: iATU regions: 8 ob, 6 ib, align 4K, limit 4G
[ 0.089562] layerscape-pcie 3400000.pcie: PCIe Gen.1 x1 link up
[ 0.089611] layerscape-pcie 3400000.pcie: PCI host bridge to bus 0000:00
[ 0.089615] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 0.089620] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
[ 0.089624] pci_bus 0000:00: root bus resource [mem 0x4040000000-0x407fffffff] (bus address [0x40000000-0x7fffffff])
[ 0.089645] pci 0000:00:00.0: [1957:81c0] type 01 class 0x060400
[ 0.089689] pci 0000:00:00.0: supports D1 D2
[ 0.089692] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 0.090513] pci 0000:01:00.0: [1172:0000] type 00 class 0xff0000
[ 0.090615] pci 0000:01:00.0: reg 0x10: [mem 0x4040000000-0x4041ffffff 64bit pref]
[ 0.091678] pci 0000:00:00.0: BAR 15: assigned [mem 0x4040000000-0x4041ffffff 64bit pref]
[ 0.091684] pci 0000:01:00.0: BAR 0: assigned [mem 0x4040000000-0x4041ffffff 64bit pref]
[ 0.091728] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[ 0.091733] pci 0000:00:00.0: bridge window [mem 0x4040000000-0x4041ffffff 64bit pref]
[ 0.091854] pcieport 0000:00:00.0: PME: Signaling with IRQ 38
[ 0.091987] pcieport 0000:00:00.0: AER: enabled with IRQ 38
[ 0.092170] layerscape-pcie 3500000.pcie: host bridge /soc/pcie@3500000 ranges:
[ 0.092189] layerscape-pcie 3500000.pcie: IO 0x4800010000..0x480001ffff -> 0x0000000000
[ 0.092199] layerscape-pcie 3500000.pcie: MEM 0x4840000000..0x487fffffff -> 0x0040000000
[ 0.092228] layerscape-pcie 3500000.pcie: iATU unroll: disabled
[ 0.092231] layerscape-pcie 3500000.pcie: iATU regions: 8 ob, 6 ib, align 4K, limit 4G
[ 1.092314] layerscape-pcie 3500000.pcie: Phy link never came up
[ 1.092368] layerscape-pcie 3500000.pcie: PCI host bridge to bus 0001:00
[ 1.092372] pci_bus 0001:00: root bus resource [bus 00-ff]
[ 1.092377] pci_bus 0001:00: root bus resource [io 0x10000-0x1ffff] (bus address [0x0000-0xffff])
[ 1.092381] pci_bus 0001:00: root bus resource [mem 0x4840000000-0x487fffffff] (bus address [0x40000000-0x7fffffff])
[ 1.092396] pci 0001:00:00.0: [1957:81c0] type 01 class 0x060400
[ 1.092436] pci 0001:00:00.0: supports D1 D2
[ 1.092438] pci 0001:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 1.093206] pci 0001:00:00.0: PCI bridge to [bus 01-ff]
[ 1.093309] pcieport 0001:00:00.0: PME: Signaling with IRQ 39
[ 1.093411] pcieport 0001:00:00.0: AER: enabled with IRQ 39
[ 1.093600] layerscape-pcie 3600000.pcie: host bridge /soc/pcie@3600000 ranges:
[ 1.093619] layerscape-pcie 3600000.pcie: IO 0x5000010000..0x500001ffff -> 0x0000000000
[ 1.093629] layerscape-pcie 3600000.pcie: MEM 0x5040000000..0x507fffffff -> 0x0040000000
[ 1.093657] layerscape-pcie 3600000.pcie: iATU unroll: disabled
[ 1.093659] layerscape-pcie 3600000.pcie: iATU regions: 8 ob, 6 ib, align 4K, limit 4G
[ 2.093744] layerscape-pcie 3600000.pcie: Phy link never came up
[ 2.093790] layerscape-pcie 3600000.pcie: PCI host bridge to bus 0002:00
[ 2.093793] pci_bus 0002:00: root bus resource [bus 00-ff]
[ 2.093798] pci_bus 0002:00: root bus resource [io 0x20000-0x2ffff] (bus address [0x0000-0xffff])
[ 2.093802] pci_bus 0002:00: root bus resource [mem 0x5040000000-0x507fffffff] (bus address [0x40000000-0x7fffffff])
[ 2.093817] pci 0002:00:00.0: [1957:81c0] type 01 class 0x060400
[ 2.093856] pci 0002:00:00.0: supports D1 D2
[ 2.093859] pci 0002:00:00.0: PME# supported from D0 D1 D2 D3hot
[ 2.094625] pci 0002:00:00.0: PCI bridge to [bus 01-ff]
[ 2.094737] pcieport 0002:00:00.0: PME: Signaling with IRQ 40
[ 2.094837] pcieport 0002:00:00.0: AER: enabled with IRQ 40

BAR size (32MiB) and type (64-bit prefetchable) is detected correctly, which indicates that two-way PCI configuration space access is working. Also, a file is created under /sys/bus/pci/devices/0000:01:00.0/resource0.
Problems arise when we try to access the BAR resource file by opening it and mmaping it in our application. Here is an example backtrace from NXP kernel 5.10.72 (with verbose debug and AER compiled in; some ARE outputs are in fact strewn in):
[ 186.126053] SError Interrupt on CPU1, code 0xbf000002 -- SError
[ 186.126063] CPU: 1 PID: 1927 Comm: pcie_test Not tainted 5.10.72-rt53-gf05b96135e34 #1
[ 186.126068] Hardware name: ADVA CC2 (DT)
[ 186.126070] pstate: 60000085 (nZCv daIf -PAN -UAO -TCO BTYPE=--)
[ 186.126069] pcieport 0000:00:00.0: AER: Uncorrected (Non-Fatal) error received: 0000:00:00.0
[ 186.126075] pc : el0_irq_naked+0x4/0x54
[ 186.126081] pcieport 0000:00:00.0: PCIe Bus Error: severity=Uncorrected (Non-Fatal), type=Transaction Layer, (Requester ID)
[ 186.126083] lr : 0x556cf50f40
[ 186.126086] sp : ffffffc016483eb0
[ 186.126085] pcieport 0000:00:00.0: device [1957:81c0] error status/mask=00004000/00400000
[ 186.126087] x29: ffffffc016483fe0 x28: ffffff8802b43900
[ 186.126090] pcieport 0000:00:00.0: [14] CmpltTO (First)
[ 186.126092]
[ 186.126093] x27: 0000000000000000 x26: 0000000000000000
[ 186.126097] x25: 0000000000000000
[ 186.126097] uio_pci_generic 0000:01:00.0: AER: can't recover (no error_detected callback)
[ 186.126099] x24: 0000000000000000
[ 186.126101] x23: 0000000060000000 x22: 000000556cf5104c
[ 186.126105] x21: 00000000ffffffff x20: ffffffc86e507000
[ 186.126109] x19: 0000000000000000 x18: 0000000000000000
[ 186.126112] x17: 0000000000000000
[ 186.126112] pcieport 0000:00:00.0: AER: device recovery failed
[ 186.126114] x16: 0000000000000000
[ 186.126116] x15: 0000000000000000 x14: 0000000000000000
[ 186.126119] x13: 0000000000000000 x12: 0000000000000000
[ 186.126123] x11: 0000000000000000 x10: 0000000000000000
[ 186.126126] x9 : 0000000000000000 x8 : 0000000000000000
[ 186.126129] x7 : 0000000000000000 x6 : 0000000000000000
[ 186.126132] x5 : 0000000000000000 x4 : 0000000000000000
[ 186.126135] x3 : 0000000000000000 x2 : 0000000000000000
[ 186.126138] x1 : 0000000000000000 x0 : 0000000000000000
[ 186.126142] Kernel panic - not syncing:
[ 186.126143] Asynchronous SError Interrupt
[ 186.126144] CPU: 1 PID: 1927 Comm: pcimem Not tainted 5.10.72-rt53-gf05b96135e34 #1
[ 186.126148] Hardware name: ADVA CC2 (DT)
[ 186.126150] Call trace:
[ 186.126151] dump_backtrace+0x0/0x1b0
[ 186.126157] show_stack+0x18/0x68
[ 186.126162] dump_stack+0xd8/0x134
[ 186.126166] panic+0xd0/0x354
[ 186.126171] nmi_panic+0x68/0xa0
[ 186.126174] arm64_serror_panic+0x78/0x84
[ 186.126178] do_serror+0x38/0x98
[ 186.126182] el1_error+0x90/0x110
[ 186.126185] el0_irq_naked+0x4/0x54
[ 187.126334] SMP: stopping secondary CPUs
[ 187.503303] Kernel Offset: disabled
[ 187.506784] CPU features: 0x0040022,21002000
[ 187.511049] Memory Limit: none

I’ve tried other methods of accessing BAR (busybox devmem read from 0x4040000000, this is basically what I do in my test application also) and modifying uio_pci_generic kernel driver to create a memory map file via pci_ioremap_bar but the result is identical. I’ve also tried all of this on NXP kernel 6.1.38 to no avail. We’ve also reconfigured the FPGA to different BAR types and sizes. The driver assesses the BAR type/size correctly from the device but accessing memory always ends up with a kernel panic.

[elszymono]

Additional verbose lspci output from root complex and FPGA:

cc2 ~ # lspci -vvv -xxx -s 0000:00:00.0
0000:00:00.0 PCI bridge: Freescale Semiconductor Inc Device 81c0 (rev 10) (prog-if 00 [Normal decode])
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 83
Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0
I/O behind bridge: 0000f000-00000fff [disabled]
Memory behind bridge: fff00000-000fffff [disabled]
Prefetchable memory behind bridge: 0000000040000000-0000000041ffffff [size=32M]
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/16 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 256 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 5GT/s, Width x1, ASPM L0s, Exit Latency L0s unlimited
ClockPM- Surprise- LLActRep+ BwNot+ ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 128 bytes, Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt+
RootCap: CRSVisible-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP+ LTR-
10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
FRS- LN System CLS Not Supported, TPHComp- ExtTPHComp- ARIFwd+
AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled, ARIFwd-
AtomicOpsCtl: ReqEn- EgressBlck-
LnkCap2: Supported Link Speeds: 2.5-5GT/s, Crosslink- Retimer- 2Retimers- DRS-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete- EqualizationPhase1-
EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
Retimer- 2Retimers- CrosslinkRes: unsupported
Capabilities: [100 v2] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
RootCmd: CERptEn- NFERptEn- FERptEn-
RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
FirstFatal- NonFatalMsg- FatalMsg- IntMsg 1
ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000
Capabilities: [148 v1] Secondary PCI Express
LnkCtl3: LnkEquIntrruptEn- PerformEqu-
LaneErrStat: 0
Kernel driver in use: pcieport
lspci: Unable to load libkmod resources: error -12
00: 57 19 c0 81 07 01 10 00 10 00 04 06 08 00 01 00
10: 00 00 00 00 00 00 00 00 00 01 ff 00 f1 01 00 00
20: f0 ff 00 00 01 40 f1 41 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 53 01 02 00
40: 01 50 23 7e 00 00 00 00 00 00 00 00 00 00 00 00
50: 05 70 88 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 10 00 42 00 01 80 00 00 10 28 00 00 12 f4 73 00
80: 08 00 11 b0 00 00 00 00 c0 03 40 00 08 00 00 00
90: 00 00 00 00 3f 04 00 00 00 00 00 00 06 00 00 00
a0: 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

cc2 ~ # lspci -vvv -xxx -s 0000:01:00.0
0000:01:00.0 Unassigned class [ff00]: Altera Corporation Device 0000 (rev 01)
Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Interrupt: pin A routed to IRQ 255
Region 0: Memory at 4040000000 (64-bit, prefetchable) [size=32M]
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [70] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 512 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM not supported
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 64 bytes, Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s (ok), Width x1 (ok)
TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Range ABCD, TimeoutDis+ NROPrPrP- LTR-
10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
FRS- TPHComp+ ExtTPHComp-
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,
AtomicOpsCtl: ReqEn-
LnkCap2: Supported Link Speeds: 2.5GT/s, Crosslink- Retimer- 2Retimers- DRS-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete- EqualizationPhase1-
EqualizationPhase2- EqualizationPhase3- LinkEqualizationRequest-
Retimer- 2Retimers- CrosslinkRes: unsupported
Capabilities: [100 v2] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
Capabilities: [148 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Capabilities: [188 v1] Secondary PCI Express
LnkCtl3: LnkEquIntrruptEn- PerformEqu-
LaneErrStat: 0
Capabilities: [b80 v1] Vendor Specific Information: ID=1172 Rev=0 Len=05c <?>
lspci: Unable to load libkmod resources: error -12
00: 72 11 00 00 02 00 10 00 01 00 00 ff 00 00 00 00
10: 0c 00 00 40 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00
40: 01 70 03 00 08 00 00 00 00 00 00 00 00 00 00 00
50: 05 70 00 01 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 10 00 02 00 02 80 00 10 10 20 00 00 11 00 40 01
80: 00 00 11 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 1f 10 00 00 00 00 00 00 02 00 00 00
a0: 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 11 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

[yipingwang]

Please refer to the following update from the AE team.

Have customer enabled the driver of Interl Stratix in kernel options?
How does the FPGA connect with LS1046A, via serdes cable?