LS1043a Interrupt Priority

[notshure]

Hello everyone,
I found out thanks to the document QorIQ LS1043A Reference Manual, Rev. 6, 07/2020, that the ls1043a processor has the following list of external interrupt input signals:

These interrupt input signals are connected to the Arm generic interrupt controller (GIC-400).

I wanted to know if there was a concept of priority over interrupts among these interrupt input signals.
If priority is present, is the priority of these interrupts programmable?

[andrei_skok]

The priority of these interrupts can be set using Interrupt Priority Registers. Refer Table 3-2 Distributor register summary  in GIC-400 Technical Reference Manual ( https://developer.arm.com/documentation/ddi0471/b). Also refer ARM Generic Interrupt Controller Architecture Specification for Priority registers.