LS1043A Boundary Scan Problem

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LS1043A Boundary Scan Problem

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simon_1983
Contributor II

Hi,

We are having trouble with boundary scan testing of our board equipped with a LS1043A.

The compliance pins are in the state requested in the BSDL-File:


ATTRIBUTE COMPLIANCE_PATTERNS OF LS1043 : ENTITY IS
"(TEST_SEL_B, SCAN_MODE_B, TBSCAN_EN_B, JTAG_BSR_VSEL)" &
"(1101)";

 

We run 2000 idle cycles at the beginning of each test. But sooner or later the Scan-Path becomes interrupted. After cutting TDI - TDO before the LS10443A but keeping TCK, TMS connected to test for reflection-issues on the clock line it seems clear that the malfunction originates from the LS1043A.

Do we need to write something into the TDR or is it only neccesarry when we want do be able to test according to IEEE 1149.6?

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ufedor
NXP Employee
NXP Employee

Please confirm that USB_SVDD is powered.

Refer to the AN5012 - QorIQ LS1043A Design Checklist, Table 4. Power and ground pin termination checklist, Note 2.

 

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simon_1983
Contributor II

USB_SVDD is powered.

It is not like there is no boundary scan function at all, but after some irshift and drshift operations the scan-bus gets interrupted.

JTAG-compliance-pins as follows:

JTAG_BSR_VSEL=1

SCAN_MODE_B=1

TBSCAN_EN_B=0

TEST_SEL_B=1

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larsthestrup
Contributor III

Hi Simon_1983
I am using a LS1046A and see the same problem, the scan chain stops working, without any chain errors.
Did you solve your problem?
Regards Lars Thestrup

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2,406 Views
simon_1983
Contributor II

Hi Lars,

Still working on it.

Writing a Value to TDR seems necessary to get BS to work properly.

Before writing to TDR you have to do about 1500-2000 idle-clocks to get the USB out of Reset.

You can try to get a Value for TDR from AN5352.

Regards Simon

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larsthestrup
Contributor III

I used AN5378 for the LS1046A to figure out the TDR settings.
Now the scan chain works, but some of the pins I can't control.
The board is un-programmed and the config for RCW is to read it from eMMC.
I guess it reads garbage, if it reads RCW when in JTAG mode.
Why simple pins (not differential) can not bee controlled, I don't know.
I have disabled 26 pins in my test program, to get the "Interconnection" test to work.

My test program starts like this (U1000 is the LS1046):
Ldi U3100,ByPass;
Ldi U1000,IOCONFIG;
Ldi U4010,ByPass;
Ldi U3000,ByPass;
Ldi U2001,ByPass;
Irshift;

U1000:TDR := 000000002C0002D60000021408002D10005044400H;

Drshift;
CLOCK RUNIDLE, 2000;
Ldi U3100,IDCODE;
Ldi U1000,IDCODE;
Ldi U4010,IDCODE;
Ldi U3000,IDCODE;
Ldi U2001,IDCODE;
Irshift;

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simon_1983
Contributor II

You are correct, AN5352 is for the LS1043A while AN5378 has the according information for the LS1046A.

I would try to do the

CLOCK RUNIDLE, 2000;

as first step before all the others, at least before writing to TDR.

It could be a Problem, that the TDR-length in the BSDL-File is not the correct size (eg. for 1043A it is really 106 Bit and in BSDL defined as 1606 Bit (this is to get the RUNIDLE in the Process of writing to TDR))

Regarding the RCW I would assume that it is not necessary for BS-Mode because the PINs then are beeing controled by the BS-TAP, but I might be wrong.

 

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ufedor
NXP Employee
NXP Employee

1) Use a digital scope to check the JTAG signals integrity.

2) Useful reference:

https://www.nxp.com/webapp/Download?colCode=AN5352&location=null

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simon_1983
Contributor II

Thank you.

In AN5352 it says:

"SCAN_MODE_B is an IEEE 1149.1 JTAG compliance enable pin.
Pin Description
1: Functional mode. This pin must be pulled up to OVDD through 1K resistance.
0: SCAN Mode."

This confuses me compared to the description in the BSDL file and AN5012:

"SCAN_MODE_B This is a test signal for factory use only and must be pulled up (100 Ω - 1 kΩ)
to OVDD for normal device operation."

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ufedor
NXP Employee
NXP Employee

The wordings are different, but the described functionality of the SCAN_MODE_B is the same.

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