Hi NXP expert :
I have a board that uses the LS1043 processor, and this board's CPU may have power integrity issues. I've found that when the DDR controller causes a CPU exception due to power integrity problems, the watchdog HRESET_B reset sometimes fails to successfully reset the CPU. Only a PORRESET_B power reset can successfully reset it.
I would like to know: for the DDR controller of the LS1043, what is the difference between these PORRESET_B and HRESET_B resets?
thanks a lot ~