LS1028ARDB saveenv

[540915622]

=> setenv bootdelay 3
=> saveenv
Saving Environment to MMC... Writing to MMC(0)... OK
=> reset
resetting ...
=

After the operation of the above command will lead to unable to restart。

In SD card boot, and executing saveenv under uboot will clear the firamware partition on the SD card。

[yipingwang]

Which version LSDK are you using?

Have you generate firmware image with the following command then deploy it to SD card.

$flex-builder -i mkfw -m ls1028ardb -b sd 

Would you please provide your u-boot log?

[540915622]

 LSDK : lsdk2004

I really generated the firmware through that command.

[yipingwang]

I didn't reproduce your problem, please refer to my following log

U-Boot 2019.10 (Jul 09 2020 - 15:28:39 +0800)

SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):1500 MHz CPU1(A72):1500 MHz
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 3c004010 00000030 00000000 00000000
00000010: 00000000 018f0000 0030c000 00000000
00000020: 01e031a0 00002580 00000000 00003296
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 200e705a 00000000
00000070: bb580000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1028AE Rev1.0-RDB, Version: C, boot from SD
FPGA: v6 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz
DRAM: 3.9 GiB
DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... *** Warning - bad CRC, using default environment

EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net:
Warning: enetc-0 (eth0) using random MAC address - ca:9b:b2:2d:de:2d
eth0: enetc-0
Warning: enetc-2 (eth2) using random MAC address - ce:bf:8f:c3:ec:6d
, eth2: enetc-2
Warning: swp0 (eth4) using random MAC address - f2:3a:ab:87:63:ad
, eth4: swp0
Warning: swp1 (eth5) using random MAC address - d6:19:b0:c1:f9:aa
, eth5: swp1
Warning: swp2 (eth6) using random MAC address - 4e:0c:ac:a3:de:31
, eth6: swp2
Warning: swp3 (eth7) using random MAC address - ee:d4:1a:5b:6f:bd
, eth7: swp3
Hit any key to stop autoboot: 0
=> setenv bootdelay 3
=> saveenv
Saving Environment to MMC... Writing to MMC(0)... OK
=> reset
resetting ...
=▒NOTICE: Fixed DDR on board

NOTICE: 4 GB DDR4, 32-bit, CL=11, ECC on
NOTICE: BL2: v1.5(release):LSDK-20.04
NOTICE: BL2: Built : 07:31:10, Jun 17 2020
NOTICE: BL31: v1.5(release):LSDK-20.04
NOTICE: BL31: Built : 07:31:23, Jun 17 2020
NOTICE: Welcome to LS1028 BL31 Phase

U-Boot 2019.10+fsl+g3cd9bc3993 (Jun 17 2020 - 07:28:06 + 0000)

SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):1500 MHz CPU1(A72):1500 MHz
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 3c004010 00000030 00000000 00000000
00000010: 00000000 018f0000 0030c000 00000000
00000020: 01e031a0 00002580 00000000 00003296
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 200e705a 00000000
00000070: bb580000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1028AE Rev1.0-RDB, Version: C, boot from NOR
FPGA: v6 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MH z
DRAM: 3.9 GiB
DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from SPI Flash... SF: Detected mt35x u02g with page size 256 Bytes, erase size 128 KiB, total 256 MiB
OK
EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net: eth0: enetc-0, eth2: enetc-2, eth4: swp0, eth5: s wp1, eth6: swp2, eth7: swp3
Hit any key to stop autoboot: 0
=> qixis_reset sd
=> NOTICE: Fixed DDR on board

NOTICE: 4 GB DDR4, 32-bit, CL=11, ECC on
NOTICE: BL2: v1.5(release):LSDK-20.04
NOTICE: BL2: Built : 15:29:17, Jul 9 2020
NOTICE: BL31: v1.5(release):LSDK-20.04
NOTICE: BL31: Built : 15:29:22, Jul 9 2020
NOTICE: Welcome to LS1028 BL31 Phase

U-Boot 2019.10 (Jul 09 2020 - 15:28:39 +0800)

SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):1500 MHz CPU1(A72):1500 MHz
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 3c004010 00000030 00000000 00000000
00000010: 00000000 018f0000 0030c000 00000000
00000020: 01e031a0 00002580 00000000 00003296
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 200e705a 00000000
00000070: bb580000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1028AE Rev1.0-RDB, Version: C, boot from SD
FPGA: v6 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MH z
DRAM: 3.9 GiB
DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
EEPROM: NXID v1
In: serial
Out: serial
Err: serial
Net:
Warning: enetc-0 (eth0) using random MAC address - 3a:ee :0c:87:fe:d7
eth0: enetc-0
Warning: enetc-2 (eth2) using random MAC address - 5a:ac :3a:de:5d:49
, eth2: enetc-2
Warning: swp0 (eth4) using random MAC address - 56:f7:3a :7d:13:cf
, eth4: swp0
Warning: swp1 (eth5) using random MAC address - 42:38:88 :a6:79:73
, eth5: swp1
Warning: swp2 (eth6) using random MAC address - 36:d4:18 :96:91:53
, eth6: swp2
Warning: swp3 (eth7) using random MAC address - 6a:4c:d3 :0b:53:a0
, eth7: swp3
Hit any key to stop autoboot: 0
=> pri bootdelay
bootdelay=3
=>

[540915622]

After you use saveenv, restart and execute run sd_bootcmd to see if it can start?

[yipingwang]

It can start after saveenv, restart and execute run sd_bootcmd.

[540915622 · Accepted solution]

In the ls1028_common.h file, I only found the address of the xspi storage env（#define CONFIG_ENV_OFFSET 0x500000）.  then you need to tell me the address where the env is stored in the SD card。

/* MMC */
#ifdef CONFIG_MMC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif

#define CONFIG_SYS_MMC_ENV_DEV 0
#define OCRAM_NONSECURE_SIZE 0x00010000
#define CONFIG_ENV_OFFSET 0x500000 /* 5MB */
#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
#define CONFIG_ENV_ADDR CONFIG_SYS_FSL_QSPI_BASE + CONFIG_ENV_OFFSET
#define CONFIG_ENV_SIZE 0x2000 /* 8KB */
#define CONFIG_ENV_SECT_SIZE 0x40000

#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE

[yipingwang]

You could refer to "4.2 LSDK memory layout and Userland" in LSDK user manual.

Boot firmware environment is deploy at 0x02800 on SD card.

0x2800*512=0x500000

[540915622]

I konw,thanks!

[540915622]

U-Boot 2019.10 (Jun 10 2020 - 16:50:22 +0800)

SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):1500 MHz CPU1(A72):1500 MHz
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 3c004010 00000030 00000000 00000000
00000010: 00000000 018f0000 0030c000 00000000
00000020: 01e031a0 00002580 00000000 00003296
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 200e705a 00000000
00000070: bb580000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1028AE Rev1.0-RDB, Version: A, boot from SD
FPGA: v6 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz
DRAM: 3.9 GiB
DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... mmc fail to send stop cmd
*** Warning - !read failed, using default environment

EEPROM: Invalid ID (ff ff ff ff)
In: serial
Out: serial
Err: serial
Net:
Warning: enetc-0 (eth0) using random MAC address - d6:90:90:3f:af:cf
eth0: enetc-0
Warning: enetc-2 (eth2) using random MAC address - b2:50:79:c0:d3:60
, eth2: enetc-2
Warning: swp0 (eth4) using random MAC address - 62:67:4c:f1:05:1d
, eth4: swp0
Warning: swp1 (eth5) using random MAC address - ba:42:0c:b3:95:ed
, eth5: swp1
Warning: swp2 (eth6) using random MAC address - a6:6e:b4:bc:d2:4e
, eth6: swp2
Warning: swp3 (eth7) using random MAC address - 12:27:8e:e4:23:c1
, eth7: swp3
Hit any key to stop autoboot: 0
=> setenv bootdelay 3
=> saveenv
Saving Environment to MMC... Writing to MMC(0)... failed
Failed (1)
=> setenv bootdelay 3
=> saveenv
Saving Environment to MMC... Writing to MMC(0)... failed
Failed (1)

=reset

U-Boot 2019.10 (Jun 10 2020 - 16:50:22 +0800)

SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):1500 MHz CPU1(A72):1500 MHz 
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 3c004010 00000030 00000000 00000000
00000010: 00000000 018f0000 0030c000 00000000
00000020: 01e031a0 00002580 00000000 00003296
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 200e705a 00000000
00000070: bb580000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1028AE Rev1.0-RDB, Version: A, boot from SD
FPGA: v6 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz
DRAM: 3.9 GiB
DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... mmc fail to send stop cmd
*** Warning - !read failed, using default environment

EEPROM: Invalid ID (ff ff ff ff)
In: serial
Out: serial
Err: serial
Net: 
Warning: enetc-0 (eth0) using random MAC address - d6:90:90:3f:af:cf
eth0: enetc-0
Warning: enetc-2 (eth2) using random MAC address - b2:50:79:c0:d3:60
, eth2: enetc-2
Warning: swp0 (eth4) using random MAC address - 62:67:4c:f1:05:1d
, eth4: swp0
Warning: swp1 (eth5) using random MAC address - ba:42:0c:b3:95:ed
, eth5: swp1
Warning: swp2 (eth6) using random MAC address - a6:6e:b4:bc:d2:4e
, eth6: swp2
Warning: swp3 (eth7) using random MAC address - 12:27:8e:e4:23:c1
, eth7: swp3
Hit any key to stop autoboot: 0 
=> setenv bootdelay 3
=> saveenv
Saving Environment to MMC... Writing to MMC(0)... OK

=reset

NOTICE: Fixed DDR on board

NOTICE: 4 GB DDR4, 32-bit, CL=11, ECC on
NOTICE: BL2: v1.5(release):LSDK-20.04-update-290520
NOTICE: BL2: Built : 16:51:48, Jun 10 2020
NOTICE: BL31: v1.5(release):LSDK-20.04-update-290520
NOTICE: BL31: Built : 16:55:29, Jun 10 2020
NOTICE: Welcome to LS1028 BL31 Phase

U-Boot 2019.10 (Jun 10 2020 - 16:50:22 +0800)

SoC: LS1028AE Rev1.0 (0x870b0010)
Clock Configuration:
CPU0(A72):1500 MHz CPU1(A72):1500 MHz
Bus: 400 MHz DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 3c004010 00000030 00000000 00000000
00000010: 00000000 018f0000 0030c000 00000000
00000020: 01e031a0 00002580 00000000 00003296
00000030: 00000000 00000010 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 200e705a 00000000
00000070: bb580000 00000000
Model: NXP Layerscape 1028a RDB Board
Board: LS1028AE Rev1.0-RDB, Version: A, boot from SD
FPGA: v6 (RDB)
SERDES1 Reference : Clock1 = 100.00MHz Clock2 = 100.00MHz
DRAM: 3.9 GiB
DDR 3.9 GiB (DDR4, 32-bit, CL=11, ECC on)
Using SERDES1 Protocol: 47960 (0xbb58)
PCIe0: pcie@3400000 Root Complex: no link
PCIe1: pcie@3500000 Root Complex: no link
WDT: Started with servicing (60s timeout)
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... mmc fail to send stop cmd
*** Warning - !read failed, using default environment

EEPROM: Invalid ID (ff ff ff ff)
In: serial
Out: serial
Err: serial
Net:

About saveenv this piece is very unstable, there is no way to save, and sometimes the environment variable loading fails。

I hope you can test it a few more times and it should reproduce the problem