Hello SUKRUTH RAMESH BABU,
According to your description, it sees that this problem is caused by the unstable hardware. Please monitor the MAC/PHY interface activity with a scope and check for HW specification.
Please try to do PHY status detection under u-boot, please modify the following section in the file include/configs/ls1021atwr.h in u-boot source code according to the Ethernet port MDIO PHY addresses on your custom board, then rebuild u-boot and deploy it to your target board.
#define TSEC1_PHY_ADDR 2
#define TSEC2_PHY_ADDR 0
#define TSEC3_PHY_ADDR 1
Please check the mido PHY information
=> mdio list
FSL_MDIO0:
0 - AR8031/AR8033 <--> eTSEC2
1 - AR8031/AR8033 <--> eTSEC3
2 - AR8031/AR8033 <--> eTSEC1
Read PHY related registers with the following commands.
mdio read <PHY address> <REGISTER Address>
Example, The link partner (“copper side”) link status bit is in Register #1 on the PHY.
=> mdio read eTSEC1 1
Reading from bus FSL_MDIO0
PHY at address 2:
1 - 0x796d
Have a great day,
TIC
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