Have a great day,
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Yes a LS1021A system without the CPLD is possible. The TWR CPLD is used to implement
1 System power and reset sequencing management
2 LCD 2-bit FDI to 1-bit conversion
3 IFC address/data multiplexed signals latch
4 Mux/demux function signal (for example, CAN3/4_TX/RX, LCD, and UCC)
5 Level shifter (for example, USB2 signals)
6 NOR bank selection logic
However, you will need for additional system logic. Most likely in your system (3, 4, 5, 6) will not needed. For example you can use NAND flash for the configuration and boot software (firmware). IFC NAND controller can be connected directly to NAND flash device.
In any case you will need to implement (1) i.e. add reset logic for the LS1021 reset signals, pull-ups/pull-downs on the POR configurations pins, the MC34VR500 helps with system power. The LS1021A does not provide HDMI port, so some glue logic and HDMI transmitter will be required (2).
It is not clear what do you mean as “even configure FPGA through JTAG connections on PCIe”. The PCIe slot has pins for JTAG, but the PCIe controller does not.
Please see also the application note AN4878 “QorIQ LS1021A Design Checklist” available on the NXP site.
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