LS1021A CPLD code

[Sebster]

Hi,

Would it be possible to get an explanation of exactly what is the CPLD doing? A flowchart or step-by-step explanations? I realize it's providing the RCW to the processor and controlling the POR. But as one is trying to design a board, one needs to understand exactly what the CPLD code does and how to modify it for or one's specific needs.

Please let me  know

Thanks in advance!

SPA

[r8070z · Accepted solution]

Have a great day,

The LS1021A itself  does not required for any CPLD. I.e. using CPLD in LS1021A based sytem is not mandatory. I guess you mean some board based on the LS1021A. But I do not see which one. For example the LS1021A-IOT Gateway Reference Design Board has CPLD. Correspondingly QorIQ LS1021A-IOT Gateway Reference Design Board Reference Manual explains the CPLD system controller architecture in chapter 4.

  If you need for CPLD code of any NXP reference design board please open a service case. Please see How I could create a Service Request?

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[Sebster]

Hello Serguei,

Thanks for the answer.

My question was specific to the  LS102xA.

I do realize that it is not mandatory to use a CPLD but it helps in setting up the correct RCW. So since this is already done by NXP, I was considering if the NXP Apps engineer, that created the CPLD code, had created a flow chart (or a table) to guide him when he was generating the RTL code. If this was available this gives a head start to duplicate or modify the CPLD code on a customer board. I already downloaded the CPLD code from extranet.

Thanks again for both your answers (ECC and CPLD).

SPA