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We intend to design gateway based on LS1043A, and downloaded the LS1043ARGW Design file from the NXP official website.Unfortunantely the design file DES0541_11_SCH_10.DSN cannot be opened by OrCAD Capture.
The attach file version.png is the version information about the installed cadence on my computer.
The attach file 1.png is the pop-up dialog when I open the design file.
I selected the "Schematic" or any other options and press "OK". The design file failed to be opened.
The attach file 2.png is the screenshot.
Could you please confirm that the design file is correct? Is the design file's size only 128 KB?
I can perfectly open the LS1043ARDB design file on my computer.
Solved! Go to Solution.
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Thanks for your reply.
I have downloaded.
Thanks again.
Have a greate day.
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See attached file.
Have a great day,
Pavel Chubakov
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Thanks for your reply.
I have downloaded.
Thanks again.
Have a greate day.
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The U53 is a PLD. This PLD is used for different functions. It is used for Reset generation, LED burning for power on indication and so on.
See schematic of the LS1043ARDB board design files:
Have a great day,
Pavel Chubakov
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This AND gate is used for the LS1043a RESET generation from debug tool (JTAG/COP header J30) or Reset Key (S1).
Have a great day,
Pavel Chubakov
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Thanks!
I am so sorry,I make a mistake.I originally want to ask what are the U53(Vx585) functions. The .pdf format design file has a chip U53, but I can not catch what the U53(Vx585) is doing? The gateway can work without U53?
Have a great day.
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This file is corrupted. Use .pdf format. It will be corrected in the next revision of the design file.
Have a great day,
Pavel Chubakov
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Thanks for your reply.
The .pdf format design file has a chip U58(Vx585). Would it be possible to give me an explanation what are the U53(Vx585) functions and what the U53(Vx585) is doing?