Hello,
We are using NXP LX2160ARDB to build a communication system, and we want to improve the data processing speed performance. To send interrupts from the NIC to the CPU core more frequently, which part of the kernel should we modify? In other words, we want to shorten the interrupt coalescing interval.
Thank you.
Solved! Go to Solution.
On lx2160a platform, networking data is processing in DPAA2 module. If your data rate exceeds the throughput of DPAA2 Ethernet ports, it will caused loss of those packets.
You could contact your DFAE to ask for the performance data of lx2160a Ethernet ports from NXP marketing team.
In addition, you could use DPDK solution to improve the networking throughput.
Kernel NAPI interrupts are rare, changing this will not improve the throughput.
Thank you for your response.
Is there any way to make NAPI interrupts more frequent?
In our experiment, the NXP device is losing packets being received.
Please refer to the figure below.
Of course, the data rate in our experiment is very high.
However, we would like to make it even faster if possible.
Is there a way to prevent the loss of those packets?
Thank you.
On lx2160a platform, networking data is processing in DPAA2 module. If your data rate exceeds the throughput of DPAA2 Ethernet ports, it will caused loss of those packets.
You could contact your DFAE to ask for the performance data of lx2160a Ethernet ports from NXP marketing team.
In addition, you could use DPDK solution to improve the networking throughput.