How to debug target initialization file for DDR4 and NOR flash

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How to debug target initialization file for DDR4 and NOR flash

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dibyarekha
Contributor IV

Hi 

we are working on a custom LS1043A based board with two DDR4(Part number MT40A256M16), while in LS1043ardb they used four DDR4(MT40A512M8). what sections do I need to  modify in CodeWarrior Target Initialization file to fit my custom board.

Similarly for NOR FLASH. we used NOR flash(MT28FW02GBBA1HPC-0AAT) in our custom board and in LS1043ardb they used NOR flash(MT28EW01G). what sections do I need to  modify in CodeWarrior Target Initialization file to fit my custom board.

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dibyarekha
Contributor IV

Hi @mrudangshelat-13 

In Layerscape Software Development Kit User Guide, Rev. 20.04_290520, in Chapter 5 Bootloaders , in 5.2.4 Deploying TF-A binaries , there is  5.2.4.1 How to compile PBL binary from RCW source file , 5.2.4.2 How to compile U-Boot binary  and 5.2.4.4 How to compile TF-A binaries but the given commands like  i.e $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw , $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot.git , . $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/atf  are not working, because they are migrated to GitHub.( https://www.nxp.com/design/software/embedded-software/nxp-github:NXP-GITHUB) on march 31 2023. 

My question is I want to do Boot flow with TF_A without OP-TEE. so how can I build u-boot.

thank you.

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mrudangshelat-13
NXP TechSupport
NXP TechSupport

Hi @dibyarekha,

Hope this post finds you well.

In order to get support to your new query, please create a new ticket using the technical support web located in the following link:
https://support.nxp.com/s/

I would also recommend you that in order to follow this request,
please do not forget to mention on the case description this case number
which is: # 00545952

Regards,
Mrudang

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mrudangshelat-13
NXP TechSupport
NXP TechSupport

Hi @dibyarekha,

Refer CodeWarrior Development Studio for QorIQ LS series - ARM V8 ISA section 5.5 Target Connection editor to edit target init file.
edit def Init_DDRC(): according to your custom board

Adding new flash device please refer to below link.
Link: https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&cad=rja&uact=8&ved=2ahUKEwj53abe3dj_A...

Regards,
Mrudang

 

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dibyarekha
Contributor IV
Hi mrudangshelat-13
I already added flash device to my codewarrior IDE and I already aware how to open and edit Target init file.
I am asking about What are the changes Do I need to change in code to detect the Custom board DDR4 and NOR Flash.
DDR4 we are using DDR4 with 256 Meg x 16 and in LS1043ARDB they used DDR4 512 Meg x 8, for this what I need to change in Target init file code.
Similarly NOR flash used in LS1043ARDB is 1GB (MT28EW01G). We are Using NOR flash is 2GB (MT28FW02GBBA1HPC-0AAT)
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mrudangshelat-13
NXP TechSupport
NXP TechSupport

Hi @dibyarekha,

I hope you are doing well!

For Custom DDR, One needs to change various parameters (number of rank/cs, data bus width, DRAM speed, timing configurations, etc) according to the datasheet of custom DDR with the help of the DDR configuration tool.

Please refer to 1.1.1 Using DDR configuration tool and 1.1.1.2 Configure DDR controller in QCVS DDR Tool User Guide

After that, the customer can validate DDR configuration using the Validation tool.
Please refer to 1.2 DDR validation in QCVS DDR Tool User Guide

Once validation is done, one can generate code and make changes in TF-A accordingly.

Please refer to the below-mentioned documents in LSDK.
TF-A DDR Driver
Changes in DDR initialization

Regards,
Mrudang